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A high voltage silicon-on-insulator lateral insulated gate bipolar transistor with a reduced cell-pitch |
Luo Xiao-Rong (罗小蓉), Wang Qi (王琦), Yao Guo-Liang (姚国亮), Wang Yuan-Gang (王元刚), Lei Tian-Fei (雷天飞), Wang Pei (王沛), Jiang Yong-Heng (蒋永恒), Zhou Kun (周坤), Zhang Bo (张波) |
State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, 610054, China |
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Abstract A high voltage (>600 V) integrable silicon-on-insulator (SOI) trench-type lateral insulated gate bipolar transistor (LIGBT) with a reduced cell-pitch is proposed. The LIGBT features multiple trenches (MTs): two oxide trenches in the drift region and a trench gate extended to the buried oxide (BOX). Firstly, the oxide trenches enhance electric field strength because of the lower permittivity of oxide than that of Si. Secondly, oxide trenches bring in multi-directional depletion, leading to a reshaped electric field distribution and an enhanced reduced-surface electric-field (RESURF) effect. Both increase the breakdown voltage (BV). Thirdly, oxide trenches fold the drift region around the oxide trenches, leading to a reduced cell-pitch. Finally, the oxide trenches enhance the conductivity modulation, resulting in a high electron/hole concentration in the drift region as well as a low forward voltage drop (Von). The oxide trenches cause a low anode-cathode capacitance, which increases the switching speed and reduces the turn-off energy loss (Eoff). The MT SOI LIGBT exhibits a BV of 603 V at a small cell-pitch of 24 μm, a Von of 1.03 V at 100 A/cm-2, a turn-off time of 250 ns and Eoff of 4.1×10-3 mJ. The trench gate extended to BOX synchronously acts as dielectric isolation between high voltage LIGBT and low voltage circuits, simplifying the fabrication processes.
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Received: 31 May 2012
Revised: 09 July 2012
Accepted manuscript online:
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PACS:
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73.40.Ty
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(Semiconductor-insulator-semiconductor structures)
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73.61.Ng
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(Insulators)
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73.90.+f
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(Other topics in electronic structure and electrical properties of surfaces, interfaces, thin films, and low-dimensional structures)
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Fund: Projects supported by the National Natural Science Foundation of China (Grant No. 61176069); the State Key Laboratory of Electronic Thin Films and Integrated Devices, China (Grant No. CXJJ201004); and the National Key Laboratory of Analog Integrated Circuit, China (Grant No. 9140C090304110C0905). |
Corresponding Authors:
Luo Xiao-Rong
E-mail: xrluo@uestc.edu.cn
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Cite this article:
Luo Xiao-Rong (罗小蓉), Wang Qi (王琦), Yao Guo-Liang (姚国亮), Wang Yuan-Gang (王元刚), Lei Tian-Fei (雷天飞), Wang Pei (王沛), Jiang Yong-Heng (蒋永恒), Zhou Kun (周坤), Zhang Bo (张波) A high voltage silicon-on-insulator lateral insulated gate bipolar transistor with a reduced cell-pitch 2013 Chin. Phys. B 22 027303
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