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Improved 4H-SiC UMOSFET with super-junction shield region |
| Pei Shen(沈培)1, Ying Wang(王颖)1,†, Xing-Ji Li(李兴冀)2, Jian-Qun Yang(杨剑群)2, Cheng-Hao Yu(于成浩)1, and Fei Cao(曹菲)1 |
1 Key Laboratory of RF Circuits and Systems, Ministry of Education, Hangzhou Dianzi University, Hangzhou 310018, China;
2 National Key Laboratory of Materials Behavior and Evaluation Technology in Space Environment, Harbin Institute of Technology, Harbin 150080, China |
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Abstract This article investigates an improved 4H-SiC trench gate metal-oxide-semiconductor field-effect transistor (MOSFET) (UMOSFET) fitted with a super-junction (SJ) shielded region. The modified structure is composed of two n-type conductive pillars, three p-type conductive pillars, an oxide trench under the gate, and a light n-type current spreading layer (NCSL) under the p-body. The n-type conductive pillars and the light n-type current spreading layer provide two paths to and promote the diffusion of a transverse current in the epitaxial layer, thus improving the specific on-resistance ($R_{\rm on,sp}$). There are three p-type pillars in the modified structure, with the p-type pillars on both sides playing the same role. The p-type conductive pillars relieve the electric field ($E$-field) in the corner of the trench bottom. Two-dimensional simulation (silvaco TCAD) indicates that $R_{\rm on,sp }$ of the modified structure, and breakdown voltage ($V_{\rm BR}$) are improved by 22.2% and 21.1% respectively, while the maximum figure of merit (${\rm FOM}=V^{2}_{\rm BR}/R_{\rm on,sp}$) is improved by 79.0%. Furthermore, the improved structure achieves a light smaller low gate-to-drain charge ($Q_{\rm gd}$) and when compared with the conventional UMOSFET (conventional-UMOS), it displays great advantages for reducing the switching energy loss. These advantages are due to the fact that the p-type conductive pillars and n-type conductive pillars configured under the gate provide a substantial charge balance, which also enables the charge carriers to be extracted quickly. In the end, under the condition of the same total charge quantity, the simulation comparison of gate charge and OFF-state characteristics between Gauss-doped structure and uniform-doped structure shows that Gauss-doped structure increases the $V_{\rm BR}$ of the device without degradation of dynamic performance.
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Received: 13 September 2020
Revised: 16 November 2020
Accepted manuscript online: 30 December 2020
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PACS:
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85.30.-z
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(Semiconductor devices)
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85.30.De
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(Semiconductor-device characterization, design, and modeling)
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| Fund: Project supported by the National Natural Science Foundation of China (Grant Nos. 61774052 and 61904045), the Youth Foundation of the Education Department of Jiangxi Province, China (Grant No. GJJ191154), and the Youth Foundation of Ping Xiang University, China (Grant No. 2018D0230). |
Corresponding Authors:
Ying Wang
E-mail: wangying7711@yahoo.com
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Cite this article:
Pei Shen(沈培), Ying Wang(王颖), Xing-Ji Li(李兴冀), Jian-Qun Yang(杨剑群), Cheng-Hao Yu(于成浩), and Fei Cao(曹菲) Improved 4H-SiC UMOSFET with super-junction shield region 2021 Chin. Phys. B 30 058502
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