| INTERDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY |
Prev
Next
|
|
|
High performance carrier stored trench bipolar transistor with dual shielding structure |
| Jin-Ping Zhang(张金平)1,2,†, Hao-Nan Deng(邓浩楠)1, Rong-Rong Zhu(朱镕镕)1, Ze-Hong Li(李泽宏)1, and Bo Zhang(张波)1 |
1 State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China(UESTC), Chengdu 610054, China;
2 Institute of Electronic and Information Engineering of UESTC in Guangdong, Dongguan 523808, China |
|
|
|
|
Abstract We propose a novel high performance carrier stored trench bipolar transistor (CSTBT) with dual shielding structure (DSS-CSTBT). The proposed DSS-CSTBT features a double trench structure with different trench profiles in the surface, in which a shallow gate trench is shielded by a deep emitter trench and a thick oxide layer under it. Compared with the conventional CSTBT (con-CSTBT), the proposed DSS-CSTBT not only alleviates the negative impact of the shallow gate trench and highly doped CS layer on the breakdown voltage (BV), but also well reduces the gate-collector capacitance $C_{\rm GC}$, gate charge $Q_{\rm G}$, and turn-off loss $E_{\rm OFF}$ of the device. Furthermore, lower turn-on loss $E_{\rm ON}$ and gate drive loss $E_{\rm DR}$ are also obtained. Simulation results show that with the same CS layer doping concentration $N_{\rm CS}=1.5\times10^{16 }$ cm$^{-3}$, the BV increases from 1312 V of the con-CSTBT to 1423 V of the proposed DSS-CSTBT with oxide layer thickness under gate ($T_{\rm og2}$) of 1 μm. Moreover, compared with the con-CSTBT, the $C_{\rm GC}$ at $V_{\rm CE} $ of 25 V and miller plateau charge ($Q_{\rm GC}$) for the proposed DSS-CSTBT with $T_{\rm og2}$ of 1 μm are reduced by 79.4% and 74.3%, respectively. With the $V_{\rm GE} $ increases from 0 V to 15 V, the total $Q_{\rm G}$ for the proposed DSS-CSTBT with $T_{\rm og2}$ of 1 μm is reduced by 49.5%. As a result, at the same on-state voltage drop ($V_{\rm CEON}$) of 1.55 V, the $E_{\rm ON}$ and $E_{\rm OFF}$ are reduced from 20.3 mJ/cm$^{2}$ and 19.3 mJ/cm$^{2}$ for the con-CSTBT to 8.2 mJ/cm$^{2}$ and 9.7 mJ/cm$^{2}$ for the proposed DSS-CSTBT with $T_{\rm og2}$ of 1 μm, respectively. The proposed DSS-CSTBT not only significantly improves the trade-off relationship between the $V_{\rm CEON}$ and $E_{\rm OFF }$ but also greatly reduces the $E_{\rm ON}$.
|
Received: 24 June 2022
Revised: 23 July 2022
Accepted manuscript online: 05 August 2022
|
|
PACS:
|
85.30.De
|
(Semiconductor-device characterization, design, and modeling)
|
| |
85.30.Pq
|
(Bipolar transistors)
|
| |
85.30.Tv
|
(Field effect devices)
|
|
| Fund: Project supported by the National Key Research and Development Program of China (Grant No. 2018YFB1201802), the Key Realm R&D Program of Guangdong Province, China (Grant No. 2018B010142001), and the Guangdong Basic and Applied Basic Research Foundation, China (Grant No. 2020A1515010128). |
Corresponding Authors:
Jin-Ping Zhang
E-mail: jinpingzhang@uestc.edu.cn
|
Cite this article:
Jin-Ping Zhang(张金平), Hao-Nan Deng(邓浩楠), Rong-Rong Zhu(朱镕镕), Ze-Hong Li(李泽宏), and Bo Zhang(张波) High performance carrier stored trench bipolar transistor with dual shielding structure 2023 Chin. Phys. B 32 038501
|
[1] Mori M, Saitou R and Yatsuo T 1993 Proceedings of the 5th International Symposium on Power Semiconductor Devices and ICs, May 18-20, 1993, Monterey, USA, p. 287
[2] Ranstad P and Nee H P 2011 IEEE Trans. Power Electron. 26 260
[3] Baliga B J 2008 Fundamentals of Power Semiconductor Devices (New York: Springer-Science)
[4] Kitagawa M, Omura I, Hasegawa S, Inoue T and Nakagawa A 1993 Proceedings of IEEE International Electron Devices Meeting, December 5-8, 1993, Washington, DC, USA, p. 679
[5] Ohi K, Ikura Y, Yoshimoto A, Sugimura K, Onozawa Y, Takahashi H and Otsuki M 2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD), May 10-14, 2015, Hong Kong, China, p. 25
[6] Yi B, Kong M F, Li P, Cheng J J and Chen X B 2019IEEE 13th International Conference on Power Electronics and Drive Systems (PEDS), July 9-12, 2019, Toulouse, France, p. 1
[7] Feng H, Yang W, Onozawa Y, Yoshimura T, Tamenori A and Sin J K 2015 IEEE Electron Dev. Lett. 36 591
[8] Feng H, Yang W, Onozawa Y, Yoshimura T, Tamenori A and Sin J K 2015 IEEE Trans. Electron Dev. 62 2555
[9] Sumitomo M, Asai J, Sakane H, Arakawa k, Higuchi Y and Matsui M 2012 24th International Symposium on Power Semiconductor Devices and ICs, June 3-7, 2012, Bruges, Belgium, p. 17
[10] Sumitomo M, Sakane H, Arakawa K, Higuchi Y and Matsui M 2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD), May 26-30, 2013, Kanazawa, Japan, p. 33
[11] Takei M, Fujikake S, Nakazawa H, Naito T, Kawashima T, Shimoyama K and Kuribayashi H 2010 22nd International Symposium on Power Semiconductor Devices & IC's (ISPSD), June 6-10, 2010, Hiroshima, Japan, p. 383
[12] Zhang J P, Li Z H, Zhang B and Li Z J 2014 Chin. Phys. B 23 088504
[13] Zhang J P, Li Z H, Zhang B and Li Z J 2012 Electron. Lett. 48 525
[14] Zhang J P, Li Z H, Zhang B and Li Z J 2012 Chin. Phys. B 21 068504
[15] Saraya T, Itou K, Takakura T, et al. 2020 IEEE International Electron Devices Meeting (IEDM), December 12-18, 2020, San Francisco, CA, USA, pp. 5.3.1-5.3.4
[16] Deviny I, Luo H H, Xiao Q, Yao Y, Zhu C L, Ngwendson L K, Xiao H B, Dai X P and Liu G Y 2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD), May 28-June 1, 2017, Sapporo, Japan, p. 147
[17] Yao Y, Luo H H, Xiao Q, Zhu C L, Xiao H B, Qin R Z, Ngwendson L K, Ning X B, Tan C J, Deviny I and Dai X P 2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD), May 13-17, 2018, Chicago, IL USA, p. 112
[18] Zhang J P, Wang K, Luo J Y, Zhao Y, Li Z H, Ren M, Gao W and Zhang B 2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC), June 12-14, 2019, Xi'an, China, p. 1
[19] Zhang J P, Xiao X, Zhu R R, Zhao Q and Zhang B 2021 IEEE J. Electron Devices Soc. 9 704 |
| No Suggested Reading articles found! |
|
|
Viewed |
|
|
|
Full text
|
|
|
|
|
Abstract
|
|
|
|
|
Cited |
|
|
|
|
Altmetric
|
|
blogs
Facebook pages
Wikipedia page
Google+ users
|
Online attention
Altmetric calculates a score based on the online attention an article receives. Each coloured thread in the circle represents a different type of online attention. The number in the centre is the Altmetric score. Social media and mainstream news media are the main sources that calculate the score. Reference managers such as Mendeley are also tracked but do not contribute to the score. Older articles often score higher because they have had more time to get noticed. To account for this, Altmetric has included the context data for other articles of a similar age.
View more on Altmetrics
|
|
|
