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An oxide/silicon core/shell nanowire metal-oxide semiconductor field-effect transistor |
Zhang Li-Ning, He Jin, Zhou Wang, Chen Lin, Xu Yi-Wen |
Tera-Scale Research Centre, Key Laboratory of Microelectronic Devices and Circuits of Ministry of Education, School of Electronics Engineering and Computer Science, Peking University, Beijing 100871, China |
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Abstract This paper studies an oxide/silicon {c}ore/{s}hell
{n}anowire {M}OSFET (OS-CSNM). Through three-dimensional device
simulations, we have demonstrated that the OS-CSNM has a lower leakage
current and higher $I_{\rm on}/I_{\rm off}$ ratio after introducing
the oxide core into a {t}raditional {n}anowire {M}OSFET (TNM).
The oxide/silicon OS-CSNM structure suppresses threshold voltage
roll-off, drain induced barrier lowering and subthreshold swing
degradation. Smaller intrinsic device delay is also observed in
OS-CSNM in comparison with that of TNM.
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Received: 05 July 2009
Revised: 02 August 2009
Published: 15 April 2010
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PACS:
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85.30.Tv
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(Field effect devices)
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85.30.De
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(Semiconductor-device characterization, design, and modeling)
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85.35.-p
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(Nanoelectronic devices)
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Fund: Project supported by National
Natural Science Foundation of China (Grant No.~60876027) and
Research Fund for the Doctoral Program of Higher Education of China
(Grant No.~200800010054). |
Cite this article:
Zhang Li-Ning, He Jin, Zhou Wang, Chen Lin, Xu Yi-Wen An oxide/silicon core/shell nanowire metal-oxide semiconductor field-effect transistor 2010 Chin. Phys. B 19 047306
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