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Chin. Phys. B, 2010, Vol. 19(4): 047307    DOI: 10.1088/1674-1056/19/4/047307
CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES Prev   Next  

Study on the drain bias effect on negative bias temperature instability degradation of an ultra-short p-channel metal-oxide-semiconductor field-effect transistor

Cao Yan-Rong(曹艳荣)a)†, Ma Xiao-Hua(马晓华) b), Hao Yue(郝跃)b), and Hu Shi-Gang(胡世刚)b)
a School of Mechano-Electric Engineering, Xidian University, Xi'an 710071, China; b Key Lab of Wide Band-Gap Semiconductor Materials and Devices, School of Microelectronics,Xidian University, Xi'an 710071, China
Abstract  This paper studies the effect of drain bias on ultra-short p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET) degradation during negative bias temperature (NBT) stress. When a relatively large gate voltage is applied, the degradation magnitude is much more than the drain voltage which is the same as the gate voltage supplied, and the time exponent gets larger than that of the NBT instability (NBTI). With decreasing drain voltage, the degradation magnitude and the time exponent all get smaller. At some values of the drain voltage, the degradation magnitude is even smaller than that of NBTI, and when the drain voltage gets small enough, the exhibition of degradation becomes very similar to the NBTI degradation. When a relatively large drain voltage is applied, with decreasing gate voltage, the degradation magnitude gets smaller. However, the time exponent becomes larger. With the help of electric field simulation, this paper concludes that the degradation magnitude is determined by the vertical electric field of the oxide, the amount of hot holes generated by the strong channel lateral electric field at the gate/drain overlap region, and the time exponent is mainly controlled by localized damage caused by the lateral electric field of the oxide in the gate/drain overlap region where hot carriers are produced.
Keywords:  negative bias temperature instability      drain bias      electric field      localized damage  
Received:  24 June 2009      Revised:  27 July 2009      Accepted manuscript online: 
PACS:  85.30.Tv (Field effect devices)  
  85.30.De (Semiconductor-device characterization, design, and modeling)  
Fund: Project supported by the National Natural Science Foundation of China (Grant Nos.~60736033 and 60376024) and the National Key Technology Research and Development Program of the Ministry of Science and Technology of China (Grant No.~2007BAK25B03).

Cite this article: 

Cao Yan-Rong(曹艳荣), Ma Xiao-Hua(马晓华), Hao Yue(郝跃), and Hu Shi-Gang(胡世刚) Study on the drain bias effect on negative bias temperature instability degradation of an ultra-short p-channel metal-oxide-semiconductor field-effect transistor 2010 Chin. Phys. B 19 047307

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