A low on-resistance buried current path SOI p-channel LDMOS compatible with n-channel LDMOS

doi:10.1088/1674-1056/22/6/067306

Abstract A novel low specific on-resistance (R_on,sp) silicon-on-insulator (SOI) p-channel lateral double-diffused metal-oxide semiconductor (pLDMOS) compatible with high voltage (HV) n-channel LDMOS (nLDMOS) is proposed. The pLDMOS is built in the N-type SOI layer with a buried P-type layer acting as a current conduction path in the on-state (BP SOI pLDMOS). Its superior compatibility with the HV nLDMOS and low voltage (LV) complementary metal-oxide semiconductor (CMOS) circuitry which are formed on the N-SOI layer can be obtained. In the off-state the P-buried layer built in the N-SOI layer causes multiple depletion and electric field reshaping, leading to an enhanced (reduced surface field) (RESURF) effect. The proposed BP SOI pLDMOS achieves not only an improved breakdown voltage (BV) but also a significantly reduced R_on,sp. The BV of the BP SOI pLDMOS increases to 319 V from 215 V of the conventional SOI pLDMOS at the same half cell pitch of 25 μ, and R_on,sp decreases from 157 mΩ·cm² to 55 mΩ·cm². Compared with the PW SOI pLDMOS, the BP SOI pLDMOS also reduces the R_on,sp by 34% with almost the same BV.

Keywords: silicon-on-insulator p-channel LDMOS p-buried layer breakdown voltage

Received: 09 August 2012
Revised: 05 January 2013
Accepted manuscript online:

PACS:	73.40.Ty	(Semiconductor-insulator-semiconductor structures)
	73.90.+f	(Other topics in electronic structure and electrical properties of surfaces, interfaces, thin films, and low-dimensional structures)
	73.61.Ng	(Insulators)

Fund: Project supported by the National Natural Science Foundation of China (Grant No. 61176069), the State Key Laboratory Science Fund of Electronic Thin Films and Integrated Devices of China (Grant No. CXJJ201004), and the National Key Laboratory Science Fund of Analog Integrated Circuit, China (Grant No. 9140C090304110C0905).

Corresponding Authors: Luo Xiao-Rong
E-mail: xrluo@uestc.edu.cn

Cite this article:

Zhou Kun (周坤), Luo Xiao-Rong (罗小蓉), Fan Yuan-Hang (范远航), Luo Yin-Chun (罗尹春), Hu Xia-Rong (胡夏融), Zhang Bo (张波) A low on-resistance buried current path SOI p-channel LDMOS compatible with n-channel LDMOS 2013 Chin. Phys. B 22 067306

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A low on-resistance buried current path SOI p-channel LDMOS compatible with n-channel LDMOS

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