Special Issue:
SPECIAL TOPIC—Post-Moore era: Materials and device physics
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TOPICAL REVIEW—Post-Moore era: Materials and device physics |
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Ferroelectric domain wall memory |
Yiming Li(李一鸣), Jie Sun(孙杰)†, and Anquan Jiang(江安全)‡ |
State Key Laboratory of ASIC & System, School of Microelectronics, Fudan University, Shanghai 200433, China |
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Abstract Ferroelectric domain walls appear as sub-nanometer-thick topological interfaces separating two adjacent domains in different orientations, and can be repetitively created, erased, and moved during programming into different logic states for the nonvolatile memory under an applied electric field, providing a new paradigm for highly miniaturized low-energy electronic devices. Under some specific conditions, the charged domain walls are conducting, differing from their insulating bulk domains. In the past decade, the emergence of atomic-layer scaling solid-state electronic devices is such demonstration, resulting in the rapid rise of domain wall nano-electronics. This review aims to the latest development of ferroelectric domain-wall memories with the presence of the challenges and opportunities and the roadmap to their future commercialization.
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Received: 11 May 2023
Revised: 06 July 2023
Accepted manuscript online: 06 July 2023
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PACS:
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85.50.-n
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(Dielectric, ferroelectric, and piezoelectric devices)
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72.20.-i
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(Conductivity phenomena in semiconductors and insulators)
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77.80.-e
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(Ferroelectricity and antiferroelectricity)
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77.84.-s
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(Dielectric, piezoelectric, ferroelectric, and antiferroelectric materials)
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Fund: Project supported by the National Key Basic Research Program of China (Grant Nos.2019YFA0308500 and 2022YFA1402900) and the National Natural Science Foundation of China (Grant No.61904034). |
Corresponding Authors:
Jie Sun, Anquan Jiang
E-mail: jie_sun@fudan.edu.cn;aqjiang@fudan.edu.cn
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Cite this article:
Yiming Li(李一鸣), Jie Sun(孙杰), and Anquan Jiang(江安全) Ferroelectric domain wall memory 2023 Chin. Phys. B 32 128504
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