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Partial-SOI high voltage laterally double-diffused MOS with a partially buried n+-layer |
Hu Sheng-Dong (胡盛东)a b, Wu Xing-He (武星河)a, Zhu Zhi (朱志)a, Jin Jing-Jing (金晶晶)a, Chen Yin-Hui (陈银晖)a |
a College of Communication Engineering, Chongqing University, Chongqing 400044, China; b National Laboratory of Analogue Integrated Circuits, No. 24 Research Institute of China Electrics Technology Group Corporation, Chongqing 400044, China |
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Abstract A novel partial silicon-on-insulator laterally double-diffused metal-oxide-semiconductor transistor (PSOI LDMOS) with a thin buried oxide layer is proposed in this paper. The key structure feature of the device is an n+-layer, which is partially buried on the bottom interface of the top silicon layer (PBNL PSOI LDMOS). The undepleted interface n+-layer leads to plenty of positive charges accumulated on the interface, which will modulate the distributions of the lateral and vertical electric fields for the device, resulting in a high breakdown voltage (BV). With the same thickness values of the top silicon layer (10 μm) and buried oxide layer (0.375 μm), the BV of the PBNL PSOI LDMOS increases to 432 V from 285 V of the conventional PSOI LDMOS, which is improved by 51.6%.
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Received: 12 October 2013
Revised: 11 December 2013
Accepted manuscript online:
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PACS:
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71.10.-w
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(Theories and models of many-electron systems)
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73.20.-r
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(Electron states at surfaces and interfaces)
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73.40.Qv
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(Metal-insulator-semiconductor structures (including semiconductor-to-insulator))
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73.40.Ty
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(Semiconductor-insulator-semiconductor structures)
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Fund: Project supported by the Natural Science Foundation of Chongqing Science and Technology Commission (CQ CSTC) (Grant No. cstcjjA40008), the Fundamental Research Funds for the Central Universities, China (Grant No. CDJZR12160003), the China Postdoctoral Science Foundation (Grant Nos. 2012M511906 and 2013T60835), and Chongqing University Postgraduates' Science and Innovation Fund, China (Grant No. CDJXS12161105). |
Corresponding Authors:
Hu Sheng-Dong
E-mail: hushengdong@hotmail.com
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Cite this article:
Hu Sheng-Dong (胡盛东), Wu Xing-He (武星河), Zhu Zhi (朱志), Jin Jing-Jing (金晶晶), Chen Yin-Hui (陈银晖) Partial-SOI high voltage laterally double-diffused MOS with a partially buried n+-layer 2014 Chin. Phys. B 23 067101
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