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Effects of post-annealed floating gate on the performance of AlGaN/GaN heterostructure field-effect transistors |
Peng Cui(崔鹏)1, Zhao-Jun Lin(林兆军)1, Chen Fu(付晨)1, Yan Liu(刘艳)1, Yuan-Jie Lv(吕元杰)2 |
1. School of Microelectronics, Shandong University, Jinan 250100, China; 2. National Key Laboratory of Application Specific Integrated Circuit(ASIC), Hebei Semiconductor Research Institute, Shijiazhuang 050051, China |
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Abstract AlGaN/GaN heterostructure field-effect transistors (HFETs) with different floating gate lengths and floating gates annealed at different temperatures, are fabricated. Using the measured capacitance-voltage curves of the gate Shottky contacts for the AlGaN/GaN HFETs, we find that after floating gate experiences 600℃ rapid thermal annealing, the larger the floating gate length, the larger the two-dimensional electron gas electron density under the gate region is. Based on the measured capacitance-voltage and current-voltage curves, the strain of the AlGaN barrier layer in the gate region is calculated, which proves that the increased electron density originates from the increased strain of the AlGaN barrier layer.
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Received: 07 June 2017
Revised: 11 August 2017
Accepted manuscript online:
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PACS:
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71.55.Eq
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(III-V semiconductors)
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85.30.Tv
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(Field effect devices)
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81.40.Ef
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(Cold working, work hardening; annealing, post-deformation annealing, quenching, tempering recovery, and crystallization)
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Fund: Project supported by the National Natural Science Foundation of China (Grant Nos. 11174182, 11574182, and 61674130). |
Corresponding Authors:
Zhao-Jun Lin
E-mail: linzj@sdu.edu.cn
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Cite this article:
Peng Cui(崔鹏), Zhao-Jun Lin(林兆军), Chen Fu(付晨), Yan Liu(刘艳), Yuan-Jie Lv(吕元杰) Effects of post-annealed floating gate on the performance of AlGaN/GaN heterostructure field-effect transistors 2017 Chin. Phys. B 26 127102
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