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Chin. Phys. B, 2016, Vol. 25(7): 077201    DOI: 10.1088/1674-1056/25/7/077201
CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES Prev   Next  

Improving breakdown voltage performance of SOI power device with folded drift region

Qi Li(李琦)1, Hai-Ou Li(李海鸥)2, Ping-Jiang Huang(黄平奖)2, Gong-Li Xiao(肖功利)3, Nian-Jiong Yang(杨年炯)4
1 Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, Guilin 541004, China;
2 Guangxi Key Laboratory of Wireless Wideband Communication and Signal Processing, Guilin University of Electronic Technology, Guilin 541004, China;
3 Guangxi Experiment Center of Information Science, Guilin 541004, China;
4 Guangxi Key Laboratory of Automobile Components and Vehicle Technology, Guangxi University of Science and Technology, Liuzhou 545006, China
Abstract  A novel silicon-on-insulator (SOI) high breakdown voltage (BV) power device with interlaced dielectric trenches (IDT) and N/P pillars is proposed. In the studied structure, the drift region is folded by IDT embedded in the active layer, which results in an increase of length of ionization integral remarkably. The crowding phenomenon of electric field in the corner of IDT is relieved by the N/P pillars. Both traits improve two key factors of BV, the ionization integral length and electric field magnitude, and thus BV is significantly enhanced. The electric field in the dielectric layer is enhanced and a major portion of bias is borne by the oxide layer due to the accumulation of inverse charges (holes) at the corner of IDT. The average value of the lateral electric field of the proposed device reaches 60 V/μm with a 10 μm drift length, which increases by 200% in comparison to the conventional SOI LDMOS, resulting in a breakdown voltage of 607 V.
Keywords:  interlaced dielectric trenches      folded drift region      breakdown voltage      N/P pillars  
Received:  05 November 2015      Revised:  11 March 2016      Published:  05 July 2016
PACS:  72.80.Cw (Elemental semiconductors)  
  73.40.Qv (Metal-insulator-semiconductor structures (including semiconductor-to-insulator))  
Fund: Project supported by the Guangxi Natural Science Foundation of China (Grant Nos. 2013GXNSFAA019335 and 2015GXNSFAA139300), Guangxi Experiment Center of Information Science of China (Grant No. YB1406), Guangxi Key Laboratory of Wireless Wideband Communication and Signal Processing of China, Key Laboratory of Cognitive Radio and Information Processing (Grant No. GXKL061505), Guangxi Key Laboratory of Automobile Components and Vehicle Technology of China (Grant No. 2014KFMS04), and the National Natural Science Foundation of China (Grant Nos. 61361011, 61274077, and 61464003).
Corresponding Authors:  Hai-Ou Li, Nian-Jiong Yang     E-mail:  lqmoon@guet.edu.cn;5041433@qq.com

Cite this article: 

Qi Li(李琦), Hai-Ou Li(李海鸥), Ping-Jiang Huang(黄平奖), Gong-Li Xiao(肖功利), Nian-Jiong Yang(杨年炯) Improving breakdown voltage performance of SOI power device with folded drift region 2016 Chin. Phys. B 25 077201

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