1.8-kV circular AlGaN/GaN/AlGaN double-heterostructure high electron mobility transistor

doi:10.1088/1674-1056/28/2/027301

Abstract In this paper, we present a 1.8-kV circular AlGaN/GaN/AlGaN double-heterostructure high electron mobility transistor (DH HEMT) with a gate-drain spacing L_GD=18.8 μm. Compared with the regular DH HEMT, our circular structure has a high average breakdown electric-field strength that increases from 0.42 MV/cm to 0.96 MV/cm. The power figure of merit V_BR²/R_ON for the circular HEMT is as high as 1.03×10⁹ V₂·Ω^-1·cm^-2. The divergence of electric field lines at the gate edge and no edge effect account for the breakdown enhancement capability of the circular structure. Experiments and analysis indicate that the circular structure is an effective method to modulate the electric field.

Keywords: AlGaN/GaN/AlGaN DH HEMTs circular structure breakdown voltage

Received: 05 September 2018
Revised: 27 November 2018
Accepted manuscript online:

PACS:	73.40.Kp	(III-V semiconductor-to-semiconductor contacts, p-n junctions, and heterojunctions)
	73.61.Ey	(III-V semiconductors)
	78.30.Fs	(III-V and II-VI semiconductors)

Fund: Project supported by the National Key Research and Development Program of China (Grant No. 2016YFB0400100), the National Natural Science Foundation of China (Grant Nos. 11435010, 61474086, and 61804125), and the Natural Science Basic Research Program of Shaanxi Province, China (Grant No. 2016ZDJC-02).

Corresponding Authors: Jin-Cheng Zhang
E-mail: jchzhang@xidian.edu.cn

Cite this article:

Sheng-Lei Zhao(赵胜雷), Zhi-Zhe Wang(王之哲), Da-Zheng Chen(陈大正), Mao-Jun Wang(王茂俊), Yang Dai(戴扬), Xiao-Hua Ma(马晓华), Jin-Cheng Zhang(张进成), Yue Hao(郝跃) 1.8-kV circular AlGaN/GaN/AlGaN double-heterostructure high electron mobility transistor 2019 Chin. Phys. B 28 027301

[1]	Tipirneni N, Koudymov A, Adivarahan V, Yang J, Simin G and Khan M A 2006 IEEE Electron Dev. Lett. 27 716
[2]	Selvaraj S L, Suzue T and Egawa T 2009 IEEE Electron Dev. Lett. 30 587
[3]	Zhao S L, Hou B, Chen W W, Mi M H, Zheng J X, Zhang J C, Ma X H and Hao Y 2016 IEEE Trans. Power Electron. 31 1517
[4]	Xiao M, Duan X L, Zhang J C and Hao Y 2018 IEEE Electron Dev. Lett. 39 719
[5]	Liu T T, Zhang K, Zhu G R, Zhou J J, Kong Y C, Yu X X and Chen T S 2018 Chin. Phys. B 27 047307
[6]	Han T C, Zhao H D, Yang L and Wang Y 2017 Chin. Phys. B 26 107301
[7]	Karmalkar S and Mishra U K 2001 IEEE Trans. Electron. Dev. 48 1515
[8]	Xing H L, Dora Y, Chini A, Heikman S, Keller S and Mishra U K 2004 IEEE Electron Dev. Lett. 25 161
[9]	Treidel E B, Hilt O, Brunner F, Würfl J and Tränkle G 2008 IEEE Trans. Electron. Dev. 55 3354
[10]	Yang S, Huang S, Chen H, Zhou C, Zhou Q, Schnee M, Zhao Q T, Schubert J and Chen K J 2012 IEEE Electron Dev. Lett. 33 979
[11]	Meneghini M, Cibin G, Bertin M, Hurkx G A M, Šonský P I J, Croon J A, Meneghesso G and Zanoni E 2014 IEEE Trans. Electron. Dev. 61 1987
[12]	Treidel E B, Brunner F, Hilt O, Cho E, Würfl J and Tränkle G 2010 IEEE Trans. Electron. Dev. 57 3050
[13]	Selvaraj S L, Watanabe A, Wakejima A and Egawa T 2012 IEEE Electron Dev. Lett. 33 1375
[14]	Lee H S, Piedra D, Sun M, Gao X, Guo S and Palacios T 2012 IEEE Electron Dev. Lett. 33 982

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1.8-kV circular AlGaN/GaN/AlGaN double-heterostructure high electron mobility transistor

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