A two-dimensional threshold voltage analytical model for metal-gate/high-k/SiO2/Si stacked MOSFETs

doi:10.1088/1674-1056/21/10/107306

Abstract In this paper the influences of the metal-gate and high-k/SiO₂/Si stacked structure on the metal-oxide-semiconductor field-effect transistor (MOSFET) are investigated. The flat-band voltage is revised by considering the influences of stacked structure and metal-semiconductor work function fluctuation. The two-dimensional Poisson's equation of potential distribution is presented. A threshold voltage analytical model for metal-gate/high-k/SiO₂/Si stacked MOSFETs is developed by solving these Poisson's equations using the boundary conditions. The model is verified by a two-dimensional device simulator, which provides the basic design guidance for metal-gate/high-k/SiO₂/Si stacked MOSFETs.

Keywords: metal-gate high-k work function flat-band voltage threshold voltage metal-oxide-semiconductor field-effect transistor

Received: 06 January 2012
Revised: 15 May 2012
Accepted manuscript online:

PACS:	73.40.Qv	(Metal-insulator-semiconductor structures (including semiconductor-to-insulator))
	73.40.Ns	(Metal-nonmetal contacts)
	73.30.+y	(Surface double layers, Schottky barriers, and work functions)

Fund: Project supported by the National Natural Science Foundation of China (Grant Nos. 60936005 and 61076097), the Cultivation Fund of the Key Scientific and Technical Innovation Project, Ministry of Education of China (Grant No. 708083), and the Fundamental Research Funds for the Central Universities (Grant No. 20110203110012).

Corresponding Authors: Ma Fei
E-mail: flyinghorse-100@163.com

Cite this article:

Ma Fei (马飞), Liu Hong-Xia (刘红侠), Fan Ji-Bin (樊继斌), Wang Shu-Long (王树龙) A two-dimensional threshold voltage analytical model for metal-gate/high-k/SiO₂/Si stacked MOSFETs 2012 Chin. Phys. B 21 107306

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A two-dimensional threshold voltage analytical model for metal-gate/high-k/SiO2/Si stacked MOSFETs

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A two-dimensional threshold voltage analytical model for metal-gate/high-k/SiO₂/Si stacked MOSFETs