A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs with high-k dielectric

doi:10.1088/1674-1056/24/10/108505

Abstract

In this paper, a surface potential based threshold voltage model of fully-depleted (FD) recessed-source/drain (Re-S/D) silicon-on-insulator (SOI) metal-oxide semiconductor field-effect transistor (MOSFET) is presented while considering the effects of high-K gate-dielectric material induced fringing-field. The two-dimensional (2D) Poisson's equation is solved in a channel region in order to obtain the surface potential under the assumption of the parabolic potential profile in the transverse direction of the channel with appropriate boundary conditions. The accuracy of the model is verified by comparing the model's results with the 2D simulation results from ATLAS over a wide range of channel lengths and other parameters, including the dielectric constant of gate-dielectric material.

Keywords: recessed-source/drain (Re-S/D) high-k gate-material fringing field and SCEs

Received: 27 February 2015
Revised: 06 May 2015
Accepted manuscript online:

PACS:	85.30.Tv	(Field effect devices)
	85.30.De	(Semiconductor-device characterization, design, and modeling)

Fund:

The author, Pramod Kumar Tiwari, was supported by the Science and Engineering Research Board (SERB), Department of Science and Technology, Ministry of Human Resource and Development, Government of India under Young Scientist Research (Grant No. SB/FTP/ETA-415/2012).

Corresponding Authors: Pramod Kumar Tiwari
E-mail: tiwarip@nitrkl.ac.in

Cite this article:

Gopi Krishna Saramekala, Sarvesh Dubey, Pramod Kumar Tiwari A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs with high-k dielectric 2015 Chin. Phys. B 24 108505

[1]	Zhang Z, Zhang S and Chan M 2004 IEEE Electron Dev. Lett. 25 740
[2]	Ke W, Han X, Li D, Wang X, Zhang T, Han R and Zhang S 2007 Semicond. Sci. Technol. 22 577
[3]	Svilicic B, Jovanovic V and Suligoj 2009 Solid-State Electron. 53 540
[4]	Kumar A and Tiwari P 2014 Solid-State Electron. 95 52
[5]	Saramekala G K, Santra A, Dubey S, Jit S and Tiwari P K 2013 Superlattices Microstruct. 60 580
[6]	Svilicic B, Jovanovic V and Suligoj 2010 Solid-State Electron. 54 545
[7]	Saramekala G K, Santra A, Kumar M, Dubey S, Jit S and Tiwari P K 2014 J. Comp. Elec. 13 467
[8]	Ahn C, Cho W, Im K, Yang J, Baek I, Lee S and Baek S (U.S. Patent) US20060131648 A1 [2006-06-22]
[9]	Hanafi H I, Boyd D C, Chan K K, Natzle W and Shi L (U.S. Patent) 6841831 B2 [2005-01-11]
[10]	Kim S D, Johnson J B , Yuan J and Woo J C S 2004 Proceedings of the International Conference on Simulation of Semiconductor Processes and Devices, September 2-4, 2004, Munich, Germany, p. 247
[11]	Hanafi H I, Boyd D C, Chan K K, Natzle W and Shi L (U.S. Patent) US6841831 B2 [2005 1 11]
[12]	Takeda H, Takeuchi K, and Hayashi Y 2010 Proceedings of IEEE Symposium on VLSI Technology, p. 63
[13]	Keyes R W 2005 Rep. Prog. Phys. 68 2701
[14]	Tripathi S L, Mishra R and Mishra R A 2012 J. Electron Dev. 16 1388
[15]	Wilk G D, Wallace R M and Anthony J M 2001 Appl. Phys. 89 5243
[16]	Slimani S and Djellouli B 2011 Proceedings of the m4th International Conference on Advances in Circuits, August 21-27, 2011, Nice/Saint Laurent du Var, France, p. 38
[17]	Liu H X and Ma F 2012 Chin. Phys. Lett. 29 127301
[18]	Ma F, Liu H X, Kuang Q W and Fan J B 2012 Chin. Phys. B 21 057304
[19]	Ma F, Liu H X, Kuang Q W and Fan J B 2012 Chin. Phys. B 21 057305
[20]	Kumar M J, Gupta S K and Venkataraman V 2006 IEEE Trans. Electron Dev. 53 706
[21]	Kamchouchi H and Zaky A 1975 Appl. Phys. 8 1365
[22]	Liu X, Jin X and Lee J H 2009 Solid-State Electron. 53 1041
[23]	Mohapatra N R, Desai M P, Narendra S G and Rao V R 2003 IEEE Trans. Electron Dev. 50 959
[24]	Liu X, Kang J, Sun L, Han R and Wang J 2002 IEEE Electron Dev. Lett. 23 270
[25]	Imam M A, Osman M A and Osman A 1995 Microelectron. Reliab. 39 487
[26]	Thean V Y, Goolsby B, Nguyen B Y, Nguyen T and Stephens T (U.S. Patent) US20060148196 A1 [2006-07-06]
[27]	Bin Y (U.S. Patent) 6420218 B1 [2002- 07-16]
[28]	Ahn C, Cho W, Im K, Yang J, Baek I, Lee S and Baek (U.S. Patent) US20060131648 A1 [2006 06 22]
[29]	Goolsby B J, Nguyen B y, Nguyen T T, Stephens T A and Thean V Y (WO Patent) WO2006073624 A1 [2006 07 13]
[30]	ATLAS User's Manual, Silvaco International, Santa Clara, CA (2012)
[31]	Granzner R, Polyakov V M, Schwierz F, Kittler M and Doll T 2003 Physica E: Low-dimensional Systems and Nanostructures 19 33
[32]	Young K K 1989 IEEE Trans. Electron Dev. 36 399
[33]	Tsutsui G, Saitoh M, Nagumo T and Hiramoto T 2005 IEEE Trans. Nanotechnol. 4 369
[34]	Dort M J V, Woerlee P H, Walker A J, Juffermans C A H and Lifka H 1992 IEEE Trans Electron Dev. 39 932
[35]	Conde A O, Sanchez F J G, Liou J J, Cerdeira A, Estrada M and Yue Y 2002 Microelectronics Reliability 42 583

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A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs with high-k dielectric

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