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Degradation mechanisms for polycrystalline silicon thin-film transistors with a grain boundary in the channel under negative gate bias stress |
| Dongli Zhang(张冬利)†, Mingxiang Wang(王明湘), and Huaisheng Wang(王槐生) |
| School of Electronic and Information Engineering, Soochow University, Suzhou 215006, China |
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Abstract The negative gate bias stress (NBS) reliability of n-type polycrystalline silicon (poly-Si) thin-film transistors (TFTs) with a distinct defective grain boundary (GB) in the channel is investigated. Results show that conventional NBS degradation with negative shift of the transfer curves is absent. The on-state current is decreased, but the subthreshold characteristics are not affected. The gate bias dependence of the drain leakage current at Vds of 5.0 V is suppressed, whereas the drain leakage current at Vds of 0.1 V exhibits obvious gate bias dependence. As confirmed via TCAD simulation, the corresponding mechanisms are proposed to be trap state generation in the GB region, positive-charge local formation in the gate oxide near the source and drain, and trap state introduction in the gate oxide.
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Received: 05 August 2022
Revised: 29 September 2022
Accepted manuscript online: 07 October 2022
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PACS:
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81.05.Gc
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(Amorphous semiconductors)
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81.05.Ea
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(III-V semiconductors)
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85.30.Tv
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(Field effect devices)
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| Fund: Project supported by the National Natural Science Foundation of China (Grant Nos. 61971299 and 61974101), the Natural Science Foundation of Jiangsu Province of China (Grant No. BK20201201), the Fund from Suzhou Science and Technology Bureau (Grant No. SYG201933), and the Fund from the State Key Laboratory of ASIC and System, Fudan University (Grant No. 2021KF005). |
Corresponding Authors:
Dongli Zhang
E-mail: dongli_zhang@suda.edu.cn
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Cite this article:
Dongli Zhang(张冬利), Mingxiang Wang(王明湘), and Huaisheng Wang(王槐生) Degradation mechanisms for polycrystalline silicon thin-film transistors with a grain boundary in the channel under negative gate bias stress 2022 Chin. Phys. B 31 128105
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