Please wait a minute...
Chin. Phys. B, 2020, Vol. 29(2): 027301    DOI: 10.1088/1674-1056/ab5fb9
CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES Prev   Next  

Breakdown voltage enhancement in GaN channel and AlGaN channel HEMTs using large gate metal height

Zhong-Xu Wang(王中旭)1, Lin Du(杜林)2, Jun-Wei Liu(刘俊伟)1, Ying Wang(王颖)3, Yun Jiang(江芸)2, Si-Wei Ji(季思蔚)2, Shi-Wei Dong(董士伟)3, Wei-Wei Chen(陈伟伟)3, Xiao-Hong Tan(谭骁洪)4, Jin-Long Li(李金龙)4, Xiao-Jun Li(李小军)3, Sheng-Lei Zhao(赵胜雷)1, Jin-Cheng Zhang(张进成)1, Yue Hao(郝跃)1
1 Key Laboratory for Wide Band-Gap Semiconductor Materials and Devices, School of Microelectronics, Xidian University, Xi'an 710071, China;
2 Shanghai Precision Metrology and Testing Research Institute, Shanghai 201109, China;
3 China Academy of Space Technology(Xi'an), Xi'an 710000, China;
4 Sichuan Institute of Solid-State Circuits, CETC, Chongqing 400060, China
Abstract  A large gate metal height technique is proposed to enhance breakdown voltage in GaN channel and AlGaN channel high-electron-mobility-transistors (HEMTs). For GaN channel HEMTs with gate-drain spacing LGD=2.5 μm, the breakdown voltage VBR increases from 518 V to 582 V by increasing gate metal height h from 0.2 μm to 0.4 μm. For GaN channel HEMTs with LGD=7 μm, VBR increases from 953 V to 1310 V by increasing h from 0.8 μm to 1.6 μm. The breakdown voltage enhancement results from the increase of the gate sidewall capacitance and depletion region extension. For Al0.4Ga0.6N channel HEMT with LGD=7 μm, VBR increases from 1535 V to 1763 V by increasing h from 0.8 μm to 1.6 μm, resulting in a high average breakdown electric field of 2.51 MV/cm. Simulation and analysis indicate that the high gate metal height is an effective method to enhance breakdown voltage in GaN-based HEMTs, and this method can be utilized in all the lateral semiconductor devices.
Keywords:  GaN channel HEMTs      AlGaN channel HEMTs      breakdown voltage      gate metal height  
Received:  04 November 2019      Revised:  05 December 2019      Accepted manuscript online: 
PACS:  73.40.Kp (III-V semiconductor-to-semiconductor contacts, p-n junctions, and heterojunctions)  
  73.61.Ey (III-V semiconductors)  
  78.30.Fs (III-V and II-VI semiconductors)  
Fund: Project supported by the National Key Science & Technology Special Project of China (Grant No. 2017ZX01001301), the National Key Research and Development Program of China (Grant No. 2016YFB0400100), and the National Natural Science Foundation of China (Grant Nos. 51777168 and 61801374).
Corresponding Authors:  Sheng-Lei Zhao, Jin-Cheng Zhang     E-mail:  slzhao@xidian.edu.cn;jchzhang@xidian.edu.cn

Cite this article: 

Zhong-Xu Wang(王中旭), Lin Du(杜林), Jun-Wei Liu(刘俊伟), Ying Wang(王颖), Yun Jiang(江芸), Si-Wei Ji(季思蔚), Shi-Wei Dong(董士伟), Wei-Wei Chen(陈伟伟), Xiao-Hong Tan(谭骁洪), Jin-Long Li(李金龙), Xiao-Jun Li(李小军), Sheng-Lei Zhao(赵胜雷), Jin-Cheng Zhang(张进成), Yue Hao(郝跃) Breakdown voltage enhancement in GaN channel and AlGaN channel HEMTs using large gate metal height 2020 Chin. Phys. B 29 027301

[1] Wu Y F, Saxler A, Moore M, Smith R P, Sheppard S, Chavarkar P M, Wisleder T, Mishra U K and Parikh P 2004 IEEE Electron Device Lett. 25 117
[2] Mishra U K, Parikh P and Wu Y F 2002 Proc. IEEE 90 1022
[3] Imada T, Kanamura M and Kikkawa T 2010 Proc. IEEE Power Electron. Conf. 1027
[4] Zhang N Q, Keller S, Parish G, Heikman S, DenBaars S P and Mishra U K 2000 IEEE Electron Device Lett. 21 421
[5] Treidel E B, Hilt O, Brunner F, Würfl J and Tränkle G 2008 IEEE Trans. Electron. Devices 55 3354
[6] Wang M J and Chen K J 2011 IEEE Trans. Electron. Devices 58 460
[7] Lee H S, Piedra D, Sun M, Gao X, Guo S and Palacios T 2012 IEEE Electron Device Lett. 33 982
[8] Nanjo T, Takeuchi M, Suita M, Oishi T, Abe Y, Tokuda Y and Aoyagi Y 2008 Appl. Phys. Lett. 92 263502
[9] Nanjo T, Imai A, Suzuki Y, Abe Y, Oishi T, Suita M, Yagyu E and Aoyagi Y 2013 IEEE Trans. Electron. Devices 60 1046
[10] Karmalkar S and Mishra U K 2001 IEEE Trans. Electron. Devices 48 1515
[11] Xing H L, Dora Y, Chini A, Heikman S, Keller S and Mishra U K 2004 IEEE Electron Device Lett. 25 161
[12] Hanawa H, Onodera H, Nakajima A and Horio K 2014 IEEE Trans. Electron. Devices 61 769
[13] Ma X H, Yu H Y, Quan S, Yang L Y, Pan C Y, Yang L, Wang H, Zhang J C and Hao Y 2011 Chin. Phys. B 20 027303
[14] Lian Y W, Lin Y S, Lu H C, Huang Y C and Hsu S S H 2012 IEEE Electron Device Lett. 33 973
[15] Wang Y, Wang M, Xie B, Wen C P, Wang J, Hao Y, Wu W, Chen K J and Shen B 2013 IEEE Electron Device Lett. 34 1370
[16] Horio K, Yonemoto K, Takayanagi H and Nakano H 2005 J. Appl. Phys. 98 124502
[17] Kunihiro K, Kasahara K, Takahashi Y and Ohno Y 1999 IEEE Electron Device Lett. 20 608
[18] Xiao M, Zhang J, Duan X, Zhang W, Shan H, Ning J and Hao Y 2018 IEEE Electron Device Lett. 39 1149
[19] Dora Y, Chakraborty A, McCarthy L, Keller S, DenBaars S P and Mishra U K 2006 IEEE Electron Device Lett. 27 713
[1] Design optimization of high breakdown voltage vertical GaN junction barrier Schottky diode with high-K/low-K compound dielectric structure
Kuiyuan Tian(田魁元), Yong Liu(刘勇), Jiangfeng Du(杜江锋), and Qi Yu(于奇). Chin. Phys. B, 2023, 32(1): 017306.
[2] A 4H-SiC trench MOSFET structure with wrap N-type pillar for low oxide field and enhanced switching performance
Pei Shen(沈培), Ying Wang(王颖), and Fei Cao(曹菲). Chin. Phys. B, 2022, 31(7): 078501.
[3] Lateral β-Ga2O3 Schottky barrier diode fabricated on (-201) single crystal substrate and its temperature-dependent current-voltage characteristics
Pei-Pei Ma(马培培), Jun Zheng(郑军), Ya-Bao Zhang(张亚宝), Xiang-Quan Liu(刘香全), Zhi Liu(刘智), Yu-Hua Zuo(左玉华), Chun-Lai Xue(薛春来), and Bu-Wen Cheng(成步文). Chin. Phys. B, 2022, 31(4): 047302.
[4] Fast-switching SOI-LIGBT with compound dielectric buried layer and assistant-depletion trench
Chunzao Wang(王春早), Baoxing Duan(段宝兴), Licheng Sun(孙李诚), and Yintang Yang(杨银堂). Chin. Phys. B, 2022, 31(4): 047304.
[5] Modeling of high permittivity insulator structure with interface charge by charge compensation
Zhi-Gang Wang(汪志刚), Yun-Feng Gong(龚云峰), and Zhuang Liu(刘壮). Chin. Phys. B, 2022, 31(2): 028501.
[6] Terminal-optimized 700-V LDMOS with improved breakdown voltage and ESD robustness
Jie Xu(许杰), Nai-Long He(何乃龙), Hai-Lian Liang(梁海莲), Sen Zhang(张森), Yu-De Jiang(姜玉德), and Xiao-Feng Gu(顾晓峰). Chin. Phys. B, 2021, 30(6): 067303.
[7] Design and simulation of AlN-based vertical Schottky barrier diodes
Chun-Xu Su(苏春旭), Wei Wen(温暐), Wu-Xiong Fei(费武雄), Wei Mao(毛维), Jia-Jie Chen(陈佳杰), Wei-Hang Zhang(张苇杭), Sheng-Lei Zhao(赵胜雷), Jin-Cheng Zhang(张进成), and Yue Hao(郝跃). Chin. Phys. B, 2021, 30(6): 067305.
[8] A super-junction SOI-LDMOS with low resistance electron channel
Wei-Zhong Chen(陈伟中), Yuan-Xi Huang(黄元熙), Yao Huang(黄垚), Yi Huang(黄义), and Zheng-Sheng Han(韩郑生). Chin. Phys. B, 2021, 30(5): 057303.
[9] Improved 4H-SiC UMOSFET with super-junction shield region
Pei Shen(沈培), Ying Wang(王颖), Xing-Ji Li(李兴冀), Jian-Qun Yang(杨剑群), Cheng-Hao Yu(于成浩), and Fei Cao(曹菲). Chin. Phys. B, 2021, 30(5): 058502.
[10] Novel Si/SiC heterojunction lateral double-diffused metal-oxide semiconductor field-effect transistor with p-type buried layer breaking silicon limit
Baoxing Duan(段宝兴), Xin Huang(黄鑫), Haitao Song (宋海涛), Yandong Wang(王彦东), and Yintang Yang(杨银堂). Chin. Phys. B, 2021, 30(4): 048503.
[11] Novel fast-switching LIGBT with P-buried layer and partial SOI
Haoran Wang(王浩然), Baoxing Duan(段宝兴), Licheng Sun(孙李诚), and Yintang Yang(杨银堂). Chin. Phys. B, 2021, 30(2): 027302.
[12] Simulation study of high voltage GaN MISFETs with embedded PN junction
Xin-Xing Fei(费新星), Ying Wang(王颖), Xin Luo(罗昕), Cheng-Hao Yu(于成浩). Chin. Phys. B, 2020, 29(8): 080701.
[13] Variable-K double trenches SOI LDMOS with high-concentration P-pillar
Lijuan Wu(吴丽娟), Lin Zhu(朱琳), Xing Chen(陈星). Chin. Phys. B, 2020, 29(5): 057701.
[14] Numerical and analytical investigations for the SOI LDMOS with alternated high-k dielectric and step doped silicon pillars
Jia-Fei Yao(姚佳飞), Yu-Feng Guo(郭宇锋), Zhen-Yu Zhang(张振宇), Ke-Meng Yang(杨可萌), Mao-Lin Zhang(张茂林), Tian Xia(夏天). Chin. Phys. B, 2020, 29(3): 038503.
[15] A novel high breakdown voltage and high switching speed GaN HEMT with p-GaN gate and hybrid AlGaN buffer layer for power electronics applications
Yong Liu(刘勇), Qi Yu(于奇), and Jiang-Feng Du(杜江锋). Chin. Phys. B, 2020, 29(12): 127701.
No Suggested Reading articles found!