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Chin. Phys. B, 2017, Vol. 26(10): 107101    DOI: 10.1088/1674-1056/26/10/107101
CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES Prev   Next  

Comparative study of electrical characteristics for n-type 4H-SiC planar and trench MOS capacitors annealed in ambient NO

Zhan-Wei Shen(申占伟)1, Feng Zhang(张峰)1,3, Sima Dimitrijev2, Ji-Sheng Han(韩吉胜)2, Guo-Guo Yan(闫果果)1, Zheng-Xin Wen(温正欣)1, Wan-Shun Zhao(赵万顺)1, Lei Wang(王雷)1, Xing-Fang Liu(刘兴昉)1, Guo-Sheng Sun(孙国胜)1,3, Yi-Ping Zeng(曾一平)1,3
1. Key Laboratory of Semiconductor Material Sciences, Institute of Semiconductors, University of Chinese Academy of Sciences, Beijing 100083, China;
2. Queensland Micro-and Nano-technology Center, Griffith University, Nathan 4111, Australia;
3. College of Materials Science and Opto-Electronic Technology, University of Chinese Academy of Sciences, Beijing 100049, China
Abstract  

The interface properties and electrical characteristics of the n-type 4H-SiC planar and trench metal-oxide-semiconductor (MOS) capacitors are investigated by measuring the capacitance voltage and current voltage. The flat-band voltage and interface state density are evaluated by the quasi-static method. It is not effective on further improving the interface properties annealing at 1250 ℃ in NO ambient for above 1 h due to the increasing interface shallow and fast states. These shallow states reduce the effective positive fixed charge density in the oxide. For the vertical MOS capacitors on the (1120) and (1100) faces, the interface state density can be reduced by approximately one order of magnitude, in comparison to the result of the planar MOS capacitors on the (0001) face under the same NO annealing condition. In addition, it is found that Fowler-Nordheim tunneling current occurs at an oxide electric field of 7 MV/cm for the planar MOS device. However, Poole-Frenkel conduction current occurs at a lower electric field of 4 MV/cm for the trench MOS capacitor. This is due to the local field crowded at the trench corner severely causing the electrons to be early captured at or emitted from the SiO2/SiC interface. These results provide a reference for an in-depth understanding of the mobility-limiting factors and long term reliability of the trench and planar SiO2/SiC interfaces.

Keywords:  4H-SiC metal-oxide-semiconductor capacitors      trench      interface states      nitric oxide annealing  
Received:  01 April 2017      Revised:  07 June 2017      Accepted manuscript online: 
PACS:  71.20.Nr (Semiconductor compounds)  
  61.72.Cc (Kinetics of defect formation and annealing)  
  73.40.Qv (Metal-insulator-semiconductor structures (including semiconductor-to-insulator))  
  73.50.Gr (Charge carriers: generation, recombination, lifetime, trapping, mean free paths)  
Fund: 

Project supported by the National Basic Research Program of China (Grant No. 2015CB759600), the National Natural Science Foundation of China (Grant Nos. 61474113 and 61574140), the Beijing NOVA Program, China (Grant No. Z1611000049161132016071), China Academy of Engineering Physics (CAEP) Microsystem and THz Science and Technology Foundation, China (Grant No. CAEPMT201502), the Beijing Municipal Science and Technology Commission Project, China (Grant Nos. Z161100002116018 and D16110300430000), and the Youth Innovation Promotion Association of Chinese Academy of Sciences (Grant No. 2012098).

Corresponding Authors:  Feng Zhang     E-mail:  fzhang@semi.ac.cn

Cite this article: 

Zhan-Wei Shen(申占伟), Feng Zhang(张峰), Sima Dimitrijev, Ji-Sheng Han(韩吉胜), Guo-Guo Yan(闫果果), Zheng-Xin Wen(温正欣), Wan-Shun Zhao(赵万顺), Lei Wang(王雷), Xing-Fang Liu(刘兴昉), Guo-Sheng Sun(孙国胜), Yi-Ping Zeng(曾一平) Comparative study of electrical characteristics for n-type 4H-SiC planar and trench MOS capacitors annealed in ambient NO 2017 Chin. Phys. B 26 107101

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