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Dynamic electrostatic-discharge path investigation relied on different impact energies in metal-oxide-semiconductor circuits |
| Tian-Tian Xie(谢田田)1,†, Jun Wang(王俊)2,†, Fei-Bo Du(杜飞波)1, Yang Yu(郁扬)2, Yan-Fei Cai(蔡燕飞)2, Er-Yuan Feng(冯二媛)2, Fei Hou(侯飞)1, and Zhi-Wei Liu(刘志伟)1,‡ |
1 State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;
2 Design Service, Semiconductor Manufacturing International Corporation, Shanghai 200120, China |
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Abstract Gate-grounded n-channel metal-oxide-semiconductor (GGNMOS) devices have been widely implemented as power clamps to protect semiconductor devices from electrostatic discharge stress owing to their simple construction, easy triggering, and low power dissipation. We present a novel I-V characterization of the GGNMOS used as the power clamp in complementary metal-oxide-semiconductor circuits as a result of switching the ESD paths under different impact energies. This special effect could cause an unexpected latch-up or pre-failure phenomenon in some applications with relatively large capacitances from power supply to power ground, and thus should be urgently analyzed and resolved. Transmission-line-pulse, human-body-modal, and light-emission tests were performed to explore the root cause.
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Received: 17 July 2022
Revised: 15 September 2022
Accepted manuscript online: 29 September 2022
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PACS:
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85.30.De
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(Semiconductor-device characterization, design, and modeling)
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| Fund: Project supported by the National Natural Science Foundation of China (Grant No. 61974017). |
Corresponding Authors:
Zhi-Wei Liu
E-mail: ziv_liu@hotmail.com
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Cite this article:
Tian-Tian Xie(谢田田), Jun Wang(王俊), Fei-Bo Du(杜飞波), Yang Yu(郁扬), Yan-Fei Cai(蔡燕飞), Er-Yuan Feng(冯二媛), Fei Hou(侯飞), and Zhi-Wei Liu(刘志伟) Dynamic electrostatic-discharge path investigation relied on different impact energies in metal-oxide-semiconductor circuits 2023 Chin. Phys. B 32 048501
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