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An improved GGNMOS triggered SCR for high holding voltage ESD protection applications |
Zhang Shuai (张帅)a, Dong Shu-Rong (董树荣)b, Wu Xiao-Jing (吴晓京)a, Zeng Jie (曾杰)b, Zhong Lei (钟雷)b, Wu Jian (吴健)b |
a Department of Materials Science, Fudan University, Shanghai 200433, China; b Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China |
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Abstract Developing an electrostatic discharge (ESD) protection device with a better latch-up immunity has been a challenging issue for the nanometer complementary metal-oxide semiconductor (CMOS) technology. In this work, an improved grounded-gate N-channel metal-oxide semiconductor (GGNMOS) transistor triggered silicon-controlled rectifier (SCR) structure, named GGSCR, is proposed for high holding voltage ESD protection applications. The GGSCR demonstrates a double snapback behavior as a result of progressive trigger-on of the GGNMOS and SCR. The double snapback makes the holding voltage increase from 3.43 V to 6.25 V as compared with the conventional low-voltage SCR. The TCAD simulations are carried out to verify the modes of operation of the device.
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Received: 27 November 2014
Revised: 30 April 2015
Accepted manuscript online:
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PACS:
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85.30.De
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(Semiconductor-device characterization, design, and modeling)
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85.30.Mn
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(Junction breakdown and tunneling devices (including resonance tunneling devices))
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85.30.Rs
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(Thyristors)
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73.40.Qv
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(Metal-insulator-semiconductor structures (including semiconductor-to-insulator))
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Corresponding Authors:
Zhang Shuai
E-mail: szhang_fudan@hotmail.com
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Cite this article:
Zhang Shuai (张帅), Dong Shu-Rong (董树荣), Wu Xiao-Jing (吴晓京), Zeng Jie (曾杰), Zhong Lei (钟雷), Wu Jian (吴健) An improved GGNMOS triggered SCR for high holding voltage ESD protection applications 2015 Chin. Phys. B 24 108502
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