Analytical threshold voltage model for strained silicon GAA-TFET

doi:10.1088/1674-1056/25/11/118501

Abstract Tunnel field effect transistors (TFETs) are promising devices for low power applications. An analytical threshold voltage model, based on the channel surface potential and electric field obtained by solving the 2D Poisson's equation, for strained silicon gate all around TFETs is proposed. The variation of the threshold voltage with device parameters, such as the strain (Ge mole fraction x), gate oxide thickness, gate oxide permittivity, and channel length has also been investigated. The threshold voltage model is extracted using the peak transconductance method and is verified by good agreement with the results obtained from the TCAD simulation.

Keywords: tunnel field effect transistor threshold voltage strained silicon

Received: 15 April 2016
Revised: 24 July 2016
Published: 05 November 2016

PACS:	85.30.De	(Semiconductor-device characterization, design, and modeling)
	85.30.Mn	(Junction breakdown and tunneling devices (including resonance tunneling devices))
	71.20.Nr	(Semiconductor compounds)

Fund: Project supported by the National Natural Science Foundation of China (Grant No. 61474085).

Corresponding Authors: Hai-Yan Kang
E-mail: Kanghaiyan5200@163.com

Cite this article:

Hai-Yan Kang(康海燕), Hui-Yong Hu(胡辉勇), Bin Wang(王斌) Analytical threshold voltage model for strained silicon GAA-TFET 2016 Chin. Phys. B 25 118501

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