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Chin. Phys. B, 2012, Vol. 21(5): 057304    DOI: 10.1088/1674-1056/21/5/057304
CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES Prev   Next  

A threshold voltage analytical model for high-k gate dielectric MOSFETs with fully overlapped lightly doped drain structures

Ma Fei,Liu Hong-Xia,Kuang Qian-Wei,Fan Ji-Bin
Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Material and Devices, School of Microelectronics, Xidian University, Xi'an 710071, China
Abstract  We investigate the influence of voltage drop across the lightly doped drain (LDD) region and the built-in potential on MOSFETs, and develop a threshold voltage model for high-k gate dielectric MOSFETs with fully overlapped LDD structures by solving the two-dimensional Poisson's equation in the silicon and gate dielectric layers. The model can predict the fringing-induced barrier lowering effect and the short channel effect. It is also valid for non-LDD MOSFETs. Based on this model, the relationship between threshold voltage roll-off and three parameters, channel length, drain voltage and gate dielectric permittivity, is investigated. Compared with the non-LDD MOSFET, the LDD MOSFET depends slightly on channel length, drain voltage, and gate dielectric permittivity. The model is verified at the end of the paper.
Keywords:  threshold voltage      high-k gate dielectric      fringing-induced barrier lowering      short channel effect     
Received:  07 September 2011      Published:  01 April 2012
PACS:  73.40.Qv (Metal-insulator-semiconductor structures (including semiconductor-to-insulator))  
  73.40.Lq (Other semiconductor-to-semiconductor contacts, p-n junctions, and heterojunctions)  
  12.39.Pn (Potential models)  
Fund: Project supported by the National Natural Science Foundation of China (Grant Nos. 60936005 and 61076097), the Cultivation Fund of the Key Scientific and Technical Innovation Project, Ministry of Education of China (Grant No. 708083), and the Fundamental Research Funds for the Central Universities of China (Grant No. 20110203110012).

Cite this article: 

Ma Fei,Liu Hong-Xia,Kuang Qian-Wei,Fan Ji-Bin A threshold voltage analytical model for high-k gate dielectric MOSFETs with fully overlapped lightly doped drain structures 2012 Chin. Phys. B 21 057304

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