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Ultrafast reconfigurable direct charge trapping devices based on few-layer MoS2 |
| Hui Gao(高辉)1,2, Xuanye Liu(刘轩冶)1,2, Peng Song(宋鹏)1,2, Chijun Wei(尉驰俊)1,2, Nuertai Jiazila(努尔泰cdot加孜拉)1,2, Jiequn Sun(孙杰群)1,2, Kang Wu(吴康)1,2, Hui Guo(郭辉)1,2,3, Haitao Yang(杨海涛)1,2,3,†, Lihong Bao(鲍丽宏)1,2,3,‡, and Hong-Jun Gao(高鸿钧)1,2,3 |
1 Institute of Physics, Chinese Academy of Sciences, Beijing 100190, China;
2 School of Physical Sciences and CAS Key Laboratory of Vacuum Physics, University of Chinese Academy of Sciences, Beijing 100049, China;
3 Hefei National Laboratory, Hefei 230088, China |
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Abstract Charge trapping devices incorporating 2D materials and high-$\kappa$ dielectrics have emerged as promising candidates for compact, multifunctional memory devices compatible with silicon-based manufacturing processes. However, traditional charge trapping devices encounter bottlenecks including complex device structure and low operation speed. Here, we demonstrate an ultrafast reconfigurable direct charge trapping device utilizing only a 30 nm-thick Al$_{2}$O$_{3}$ trapping layer with a MoS$_{2}$ channel, where charge traps reside within the Al$_{2}$O$_{3}$ bulk confirmed by transfer curves with different gate-voltage sweeping rates and photoluminescence (PL) spectra. The direct charging tapping device shows exceptional memory performance in both three-terminal and two-terminal operation modes characterized by ultrafast three-terminal operation speed ($\sim$300 ns), an extremely low OFF current of 10$^{-14}$ A, a high ON/OFF current ratio of up to 10$^{7}$, and stable retention and endurance properties. Furthermore, the device with a simple symmetrical structure exhibits $V_{\rm D}$ polarity-dependent reverse rectification behavior in the high resistance state (HRS), with a rectification ratio of 10$^{5}$. Additionally, utilizing the synergistic modulation of the conductance of the MoS$_{2}$ channel by $V_{\rm D}$ and $V_{\rm G}$, it achieves gate-tunable reverse rectifier and ternary logic capabilities.
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Received: 30 September 2024
Revised: 02 November 2024
Accepted manuscript online: 05 November 2024
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PACS:
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72.20.Jv
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(Charge carriers: generation, recombination, lifetime, and trapping)
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73.20.Hb
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(Impurity and defect levels; energy states of adsorbed species)
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73.40.Ei
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(Rectification)
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73.40.Qv
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(Metal-insulator-semiconductor structures (including semiconductor-to-insulator))
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| Fund: This work was supported by the National Key Research & Development Project of China (Grant No. 2022YFA1204100), the National Natural Science Foundation of China (Grant No. 62488201), CAS Project for Young Scientists in Basic Research (Grant No. YSBR-003), and the Innovation Program of Quantum Science and Technology (Grant No. 2021ZD0302700). |
Corresponding Authors:
Haitao Yang, Lihong Bao
E-mail: htyang@iphy.ac.cn;lhbao@iphy.ac.cn
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Cite this article:
Hui Gao(高辉), Xuanye Liu(刘轩冶), Peng Song(宋鹏), Chijun Wei(尉驰俊), Nuertai Jiazila(努尔泰cdot加孜拉), Jiequn Sun(孙杰群), Kang Wu(吴康), Hui Guo(郭辉), Haitao Yang(杨海涛), Lihong Bao(鲍丽宏), and Hong-Jun Gao(高鸿钧) Ultrafast reconfigurable direct charge trapping devices based on few-layer MoS2 2024 Chin. Phys. B 33 127201
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