Enhancement of holding voltage by a modified low-voltage trigger silicon-controlled rectifier structure for electrostatic discharge protection

doi:10.1088/1674-1056/ac7b1d

Abstract A novel structure of low-voltage trigger silicon-controlled rectifiers (LVTSCRs) with low trigger voltage and high holding voltage is proposed for electrostatic discharge (ESD) protection. The proposed ESD protection device possesses an ESD implant and a floating structure. This improvement enhances the current discharge capability of the gate-grounded NMOS and weakens the current gain of the silicon-controlled rectifier current path. According to the simulation results, the proposed device retains a low trigger voltage characteristic of LVTSCRs and simultaneously increases the holding voltage to 5.53 V, providing an effective way to meet the ESD protection requirement of the 5 V CMOS process.

Keywords: electrostatic discharge floating n-well low-voltage trigger silicon-controlled rectifier

Received: 26 March 2022
Revised: 17 June 2022
Accepted manuscript online: 22 June 2022

PACS:

85.30.De

(Semiconductor-device characterization, design, and modeling)

Fund: Project supported by the National Natural Science Foundation of China (Grant No. 61904110)

Corresponding Authors: Wugang Liao
E-mail: wgliao@szu.edu.cn

Cite this article:

Yuankang Chen(陈远康), Yuanliang Zhou(周远良), Jie Jiang(蒋杰), Tingke Rao(饶庭柯), Wugang Liao(廖武刚), and Junjie Liu(刘俊杰) Enhancement of holding voltage by a modified low-voltage trigger silicon-controlled rectifier structure for electrostatic discharge protection 2023 Chin. Phys. B 32 028502

[1] Kranthi N K and Sarro J D 2021 IEEE Trans. Electron Dev. 68 4242
[2] Du F and Liou J J 2019 IEEE Trans. Electron Dev. 66 2062
[3] Ma Q G, Wang H H and Zhang S D 2019 Acta Phys Sin. 68 158501 (in Chinese)
[4] Lin C Y, Wu Y H and Ker MD 2016 IEEE Electron Dev. Lett. 37 1387
[5] Cui Q, Salcedo J A, Parthasarathy S, Zhou Y, Liou J J and Hajjar J J 2013 IEEE Electron Dev. Lett. 34 178
[6] Lee J H, Prabhu M and Natarajan M I 2018 IEEE Electron Dev. Lett. 39 1011
[7] Guan J, Wang Y, Hao S, Zheng Y and Jin X 2017 IEEE Electron Dev. Lett. 38 1716
[8] Du F and Liou J J 2020 IEEE Trans. Electron Dev. 67 576
[9] Liang H, Xu Q, Zhu L, Gu X, Sun G and Lin F 2019 IEEE Electron Dev. Lett. 40 163
[10] Song B B, Do K I and Koo Y S 2018 IEEE J. Electron Dev. Soc. 6 691
[11] Huang X, Liou J J, Liu Z, Liu F, Liu J and Cheng H 2016 IEEE Electron Dev. Lett. 37 1311
[12] Ker M D and Chen S H 2007 IEEE J. Solid-State Circuits. 42 1158
[13] Parthasarathy S, Salcedo J A and Hajjar J 2013 Proceedings of the IEEE International Reliability Physics Symposium, April 14-18, 2013, Anaheim, USA, p. EL.5.1
[14] Wang Y, Chen X, Jia D, Lu J, Wei W and Dong P 2020 IEEE Trans. Dev. Mater. Relib. 20 658
[15] Chen R, Liu H, Song W, Du F and Zhang H 2020 Nanoscale Res. Lett. 15 212
[16] Han Y, Song B, Dong S R, Li M L and Ma F 2010 Microelectron. Rel. 51 332
[17] Song W, Du F B and Liu Z W 2020 Semicond. Sci. Technol. 35 055015
[18] Salcedo J A, Liou J J, Liu Z and Vinson J E 2007 IEEE Trans. Electron Dev. 54 822
[19] Ma Q G, Zhou L F, Yu Y, Ma G Y and Zhang S D 2019 Acta Phys Sin. 68 108501 (in Chinese)
[20] Li J Y, Wang Y and Jia D D 2020 Chin. Phys. B 29 108501
[21] Jin X, Zheng Y, Wang Y, Guan J and Hao S 2017 Solid-State Electron. 139 69
[22] Dong S R, Wu J, Miao M and Liou J J 2012 IEEE Electron Dev. Lett. 33 1345
[23] Chen H W, Chen S L, Huang Y T and Chen H H 2020 IEEE J. Electron Dev. Soc. 8 864

[1]	Dynamic electrostatic-discharge path investigation relied on different impact energies in metal-oxide-semiconductor circuits Tian-Tian Xie(谢田田), Jun Wang(王俊), Fei-Bo Du(杜飞波), Yang Yu(郁扬), Yan-Fei Cai(蔡燕飞), Er-Yuan Feng(冯二媛), Fei Hou(侯飞), and Zhi-Wei Liu(刘志伟). Chin. Phys. B, 2023, 32(4): 048501.
[2]	Design and investigation of novel ultra-high-voltage junction field-effect transistor embedded with NPN Xi-Kun Feng(冯希昆), Xiao-Feng Gu(顾晓峰), Qin-Ling Ma(马琴玲), Yan-Ni Yang(杨燕妮), and Hai-Lian Liang(梁海莲). Chin. Phys. B, 2021, 30(7): 078502.
[3]	Terminal-optimized 700-V LDMOS with improved breakdown voltage and ESD robustness Jie Xu(许杰), Nai-Long He(何乃龙), Hai-Lian Liang(梁海莲), Sen Zhang(张森), Yu-De Jiang(姜玉德), and Xiao-Feng Gu(顾晓峰). Chin. Phys. B, 2021, 30(6): 067303.
[4]	Enhanced gated-diode-triggered silicon-controlled rectifier for robust electrostatic discharge (ESD) protection applications Wenqiang Song(宋文强), Fei Hou(侯飞), Feibo Du(杜飞波), Zhiwei Liu(刘志伟), Juin J. Liou(刘俊杰). Chin. Phys. B, 2020, 29(9): 098502.
[5]	Design of a novel high holding voltage LVTSCR with embedded clamping diode Ling Zhu(朱玲), Hai-Lian Liang(梁海莲), Xiao-Feng Gu(顾晓峰), Jie Xu(许杰). Chin. Phys. B, 2020, 29(6): 068503.
[6]	High holding voltage SCR for robust electrostatic discharge protection Zhao Qi(齐钊), Ming Qiao(乔明), Yitao He(何逸涛), Bo Zhang(张波). Chin. Phys. B, 2017, 26(7): 077304.
[7]	Structure-dependent behaviors of diode-triggered silicon controlled rectifier under electrostatic discharge stress Li-Zhong Zhang(张立忠), Yuan Wang(王源), Yan-Dong He(何燕冬). Chin. Phys. B, 2016, 25(12): 128501.
[8]	Novel substrate trigger SCR-LDMOS stacking structure for high-voltage ESD protection application Ma Jin-Rong (马金荣), Qiao Ming (乔明), Zhang Bo (张波). Chin. Phys. B, 2015, 24(4): 047303.
[9]	An improved GGNMOS triggered SCR for high holding voltage ESD protection applications Zhang Shuai (张帅), Dong Shu-Rong (董树荣), Wu Xiao-Jing (吴晓京), Zeng Jie (曾杰), Zhong Lei (钟雷), Wu Jian (吴健). Chin. Phys. B, 2015, 24(10): 108502.
[10]	A novel diode string triggered gated-PiN junction device for electrostatic discharge protection in 65-nm CMOS technology Zhang Li-Zhong (张立忠), Wang Yuan (王源), Lu Guang-Yi (陆光易), Cao Jian (曹健), Zhang Xing (张兴). Chin. Phys. B, 2015, 24(10): 108503.
[11]	Low-parasitic ESD protection strategy for RF ICs in 0.35μm CMOS process Wang Yuan(王源), Jia Song(贾嵩), Chen Zhong-Jian(陈中建), and Ji Li-Jiu(吉利久). Chin. Phys. B, 2006, 15(10): 2297-2305.

No Suggested Reading articles found!

Viewed

Full text

Abstract

Cited

Metrics
Related Articles

Enhancement of holding voltage by a modified low-voltage trigger silicon-controlled rectifier structure for electrostatic discharge protection

Cite this article:

Online attention