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Chin. Phys. B, 2014, Vol. 23(8): 088501    DOI: 10.1088/1674-1056/23/8/088501
SPECIAL TOPI—International Conference on Nanoscience & Technology, China 2013 Prev   Next  

Comparison between N2 and O2 anneals on the integrity of an Al2O3/Si3N4/SiO2/Si memory gate stack

Chu Yu-Qiong (褚玉琼)a, Zhang Man-Hong (张满红)b, Huo Zong-Liang (霍宗亮)a, Liu Ming (刘明)a
a Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;
b School of Electrical and Electronic Engineering, North China Electric Power University, Beijing 102206, China
Abstract  In this paper the endurance characteristics and trap generation are investigated to study the effects of different post-deposition anneals (PDAs) on the integrity of an Al2O3/Si3N4/SiO2/Si memory gate stack. The flat-band voltage (Vfb) turnarounds are observed in both the programmed and erased states of the N2-PDA device. In contrast, this turnaround is observed only in the erased state of the O2-PDA device. The Vfb in the programmed state of the O2-PDA device keeps increasing with increasing program/erase (P/E) cycles. Through the analyses of endurance characteristics and the low voltage round-trip current transients, it is concluded that in both kinds of device there are an unknown type of pre-existing characteristic deep traps and P/E stress-induced positive oxide charges. In the O2-PDA device two extra types of trap are also found: the pre-existing border traps and the P/E stress-induced negative traps. Based on these four types of defects we can explain the endurance characteristics of two kinds of device. The switching property of pre-existing characteristic deep traps is also discussed.
Keywords:  charge trapping memory      post deposition anneal      endurance      traps  
Received:  04 September 2013      Revised:  16 December 2013      Accepted manuscript online: 
PACS:  85.30.-z (Semiconductor devices)  
Fund: Project supported in part by the National Basic Research Program of China (Grant Nos. 2010CB934200 and 2011CBA00600), the National Natural Science Foundation of China (Grant Nos. 61176073 and 61176080), and the Director's Fund of the Institute of Microelectronics, Chinese Academy of Sciences.
Corresponding Authors:  Zhang Man-Hong, Huo Zong-Liang, Liu Ming     E-mail:  zhangmanhong@ncepu.edu.cn;huozongliang@ime.ac.cn;liuming@ime.ac.cn

Cite this article: 

Chu Yu-Qiong (褚玉琼), Zhang Man-Hong (张满红), Huo Zong-Liang (霍宗亮), Liu Ming (刘明) Comparison between N2 and O2 anneals on the integrity of an Al2O3/Si3N4/SiO2/Si memory gate stack 2014 Chin. Phys. B 23 088501

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