Investigation of gate oxide traps effect on NAND flash memory by TCAD simulation

doi:10.1088/1674-1056/ab695f

Abstract The effects of gate oxide traps on gate leakage current and device performance of metal-oxide-nitride-oxide-silicon (MONOS)-structured NAND flash memory are investigated through Sentaurus TCAD. The trap-assisted tunneling (TAT) model is implemented to simulate the leakage current of MONOS-structured memory cell. In this study, trap position, trap density, and trap energy are systematically analyzed for ascertaining their influences on gate leakage current, program/erase speed, and data retention properties. The results show that the traps in blocking layer significantly enhance the gate leakage current and also facilitates the cell program/erase. Trap density ~10¹⁸ cm^-3 and trap energy ~1 eV in blocking layer can considerably improve cell program/erase speed without deteriorating data retention. The result conduces to understanding the role of gate oxide traps in cell degradation of MONOS-structured NAND flash memory.

Keywords: NAND flash reliability gate oxide traps trap-assisted tunneling TCAD simulation

Received: 15 October 2019
Revised: 30 December 2019
Accepted manuscript online:

PACS:	85.25.Hv	(Superconducting logic elements and memory devices; microelectronic circuits)
	85.40.-e	(Microelectronics: LSI, VLSI, ULSI; integrated circuit fabrication technology)
	85.35.Gv	(Single electron devices)

Fund: Project supported by the SanDisk Info Tech Shanghai, China and the Institute of Microelectronic Materials & Technology, School of Materials Science and Engineering, Shanghai Jiao Tong University, China.

Corresponding Authors: Li-Ming Gao
E-mail: liming.gao@sjtu.edu.cn

Cite this article:

He-Kun Zhang(章合坤), Xuan Tian(田璇), Jun-Peng He(何俊鹏), Zhe Song(宋哲), Qian-Qian Yu(蔚倩倩), Liang Li(李靓), Ming Li(李明), Lian-Cheng Zhao(赵连城), Li-Ming Gao(高立明) Investigation of gate oxide traps effect on NAND flash memory by TCAD simulation 2020 Chin. Phys. B 29 038501

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Investigation of gate oxide traps effect on NAND flash memory by TCAD simulation

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