Experimental and numerical analysis of the multi-recessed gate structure for microwave silicon carbide power MESFETs
Deng Xiao-Chuan(邓小川)a)†, Feng Zhen(冯震)b), Zhang Bo(张波)a), Li Zhao-Ji(李肇基)a), Li Liang(李亮)b), and Pan Hong-Shu(潘宏菽)b)
a State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China; b The National Key Laboratory of ASIC, Shijiazhuang 050002, China
Abstract This paper reports that multi-recessed gate 4H-SiC MESFETs (metal semiconductor filed effect transistors) with a gate periphery of 5-mm are fabricated and characterized. The multi-recessed region under the gate terminal is applied to improve the gate--drain breakdown voltage and to alleviate the trapping induced instabilities by moving the current path away from the surface of the device. The experimental results demonstrate that microwave output power density, power gain and power-added efficiency for multi-finger 5-mm gate periphery SiC MESFETs with multi-recessed gate structure are about 29%, 1.1dB and 7% higher than those of conventional devices fabricated in this work using the same process.
Received: 10 November 2008
Revised: 21 December 2008
Accepted manuscript online:
Fund: Project
supported by Major State Basic Research Development Program
of China (Grant No 51327010101).
Cite this article:
Deng Xiao-Chuan(邓小川), Feng Zhen(冯震), Zhang Bo(张波), Li Zhao-Ji(李肇基), Li Liang(李亮), and Pan Hong-Shu(潘宏菽) Experimental and numerical analysis of the multi-recessed gate structure for microwave silicon carbide power MESFETs 2009 Chin. Phys. B 18 3018
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