Simulation of grain boundary effect on characteristics of ZnO thin film transistor by considering the location and orientation of grain boundary
Zhou Yu-Ming(周郁明)a)b)†, He Yi-Gang(何怡刚)b), Lu Ai-Xia(陆爱霞)a), and Wan Qing(万青)a)
a College of Physics and Microelectronic, Hunan University, Changsha 410082, China; b College of Electrical and Information Engineering, Hunan University, Changsha 410082, China
Abstract The grain boundaries (GBs) have a strong effect on the electric properties of ZnO thin film transistors (TFTs). A novel grain boundary model was developed to analyse the effect. The model was characterized with different angles between the orientation of the grain boundary and the channel direction. The potential barriers formed by the grain boundaries increase with the increase of the grain boundary angle, so the degradation of the transistor characteristics increases. When a grain boundary is close to the drain edge, the potential barrier height reduces, so the electric properties were improved.
Received: 15 February 2009
Revised: 07 April 2009
Accepted manuscript online:
Fund: Project was supported by the
National Natural Science Foundation of China (Grant Nos 50677014,
50602014 and 10874042), the National High Technology Joint Research
Program of China (Grant No 2006AA04A104), the Science-Technology
Foundation of Hunan Province of China (Grant
Nos 2008RS4003 and 07jj107).
Cite this article:
Zhou Yu-Ming(周郁明), He Yi-Gang(何怡刚), Lu Ai-Xia(陆爱霞), and Wan Qing(万青) Simulation of grain boundary effect on characteristics of ZnO thin film transistor by considering the location and orientation of grain boundary 2009 Chin. Phys. B 18 3966
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