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Chin. Phys. B, 2016, Vol. 25(12): 124401    DOI: 10.1088/1674-1056/25/12/124401

A technique for simultaneously improving the product of cutoff frequency-breakdown voltage and thermal stability of SOI SiGe HBT

Qiang Fu(付强)1,2, Wan-Rong Zhang(张万荣)1, Dong-Yue Jin(金冬月)1, Yan-Xiao Zhao(赵彦晓)1, Xiao Wang(王肖)1
1. College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing 100124, China;
2. College of Physics, Liaoning University, Shenyang 110036, China

The product of the cutoff frequency and breakdown voltage (fT×BVCEO) is an important figure of merit (FOM) to characterize overall performance of heterojunction bipolar transistor (HBT). In this paper, an approach to introducing a thin N+-buried layer into N collector region in silicon-on-insulator (SOI) SiGe HBT to simultaneously improve the FOM of fT×BVCEO and thermal stability is presented by using two-dimensional (2D) numerical simulation through SILVACO device simulator. Firstly, in order to show some disadvantages of the introduction of SOI structure, the effects of SOI insulation layer thickness (TBOX) on fT, BVCEO, and the FOM of fT×BVCEO are presented. The introduction of SOI structure remarkably reduces the electron concentration in collector region near SOI substrate insulation layer, obviously reduces fT, slightly increases BVCEO to some extent, but ultimately degrades the FOM of fT×BVCEO. Although the fT, BVCEO, and the FOM of fT×BVCEO can be improved by increasing SOI insulator SiO2 layer thickness TBOX in SOI structure, the device temperature and collector current are increased due to lower thermal conductivity of SiO2 layer, as a result, the self-heating effect of the device is enhanced, and the thermal stability of the device is degraded. Secondly, in order to alleviate the foregoing problem of low electron concentration in collector region near SOI insulation layer and the thermal stability resulting from thick TBOX, a thin N+-buried layer is introduced into collector region to not only improve the FOM of fT×BVCEO, but also weaken the self-heating effect of the device, thus improving the thermal stability of the device. Furthermore, the effect of the location of the thin N+-buried layer in collector region is investigated in detail. The result show that the FOM of fT×BVCEO is improved and the device temperature decreases as the N+-buried layer shifts toward SOI substrate insulation layer. The approach to introducing a thin N+-buried layer into collector region provides an effective method to improve SOI SiGe HBT overall performance.

Keywords:  SOI SiGe HBT      collector optimization      fT×      BVCEO      self-heating effect  
Received:  07 July 2016      Revised:  23 August 2016      Accepted manuscript online: 
PACS:  44.10.+i (Heat conduction)  
  72.20.Pa (Thermoelectric and thermomagnetic effects)  
  85.30.De (Semiconductor-device characterization, design, and modeling)  

Project supported by the National Natural Science Foundation of China (Grant Nos. 61574010, 60776051, 61006059, and 61006044), the Beijing Municipal Natural Science Foundation, China (Grant No. 4142007), and the Beijing Municipal Education Committee, China (Grant No. KM200910005001).

Corresponding Authors:  Qiang Fu     E-mail:

Cite this article: 

Qiang Fu(付强), Wan-Rong Zhang(张万荣), Dong-Yue Jin(金冬月), Yan-Xiao Zhao(赵彦晓), Xiao Wang(王肖) A technique for simultaneously improving the product of cutoff frequency-breakdown voltage and thermal stability of SOI SiGe HBT 2016 Chin. Phys. B 25 124401

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