Abstract A novel double-gate (DG) junction field effect transistor (JFET) with depletion operation mode is proposed in this paper. Compared with the conventional DG MOSFET, the novel DG JFET can achieve excellent performance with square body design, which relaxes the requirement on silicon film thickness of DG devices. Moreover, due to the structural symmetry, both p-type and n-type devices can be realized on exactly the same structure, which greatly simplifies integration. It can reduce the delay by about 60% in comparison with the conventional DG MOSFETs.
Received: 24 May 2007
Revised: 02 July 2007
Accepted manuscript online:
(Semiconductor-device characterization, design, and modeling)
Fund: Project supported by the National
Natural Science Foundation of China (Grant No 60625403), by the
Special Funds for Major State Basic Research (973) Projects and NCET
program.
Cite this article:
Hou Xiao-Yu(侯晓宇), Huang Ru(黄如), Chen Gang(陈刚), Liu Sheng(刘晟), Zhang Xing(张兴), Yu Bin(俞滨), and Wang Yang-Yuan(王阳元) A novel 10-nm physical gate length double-gate junction field effect transistor 2008 Chin. Phys. B 17 685
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