Positive gate-bias temperature instability of ZnO thin-film transistor
Liu Yu-Rong (刘玉荣)a b, Su Jing (苏晶)a, Lai Pei-Tao (黎沛涛)c, Yao Ruo-He (姚若河)a b
a The School of Electronic and Information Engineering, South China University of Technology, Guangzhou 510640, China; b National Enginering Technology Research Center for Mobile Ultrasonic Detection, South China University of Technology, Guangzhou 510640, China; c Department of Electrical and Electronic Engineering, the University of Hong Kong, Pokfulam Rd., Hong Kong, China
Abstract The positive gate-bias temperature instability of a radio frequency (RF) sputtered ZnO thin-film transistor (ZnO TFT) is investigated. Under positive gate-bias stress, the saturation drain current and OFF-state current decrease, and the threshold voltage shifts toward the positive direction. The stress amplitude and stress temperature are considered as important factors in threshold-voltage instability, and the time dependences of threshold voltage shift under various bias temperature stress conditions could be described by a stretched-exponential equation. Based on the analysis of hysteresis behaviors in current-voltage and capacitance-voltage characteristics before and after the gate-bias stress, it can be clarified that the threshold-voltage shift is predominantly attributed to the trapping of negative charge carriers in the defect states located at the gate-dielectric/channel interface.
Fund: Project supported by the National Natural Science Foundation of China (Grant Nos. 61076113 and 61274085) and the Research Grants Council of Hong Kong, China (Grant No. 7133/07E).
Corresponding Authors:
Liu Yu-Rong
E-mail: phlyr@scut.edu.cn
Cite this article:
Liu Yu-Rong (刘玉荣), Su Jing (苏晶), Lai Pei-Tao (黎沛涛), Yao Ruo-He (姚若河) Positive gate-bias temperature instability of ZnO thin-film transistor 2014 Chin. Phys. B 23 068501
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