High-performance amorphous In-Ga-Zn-O thin-film transistor nonvolatile memory with a novel p-SnO/n-SnO2 heterojunction charge trapping stack
Wen Xiong(熊文)1, Jing-Yong Huo(霍景永)1, Xiao-Han Wu(吴小晗)1, Wen-Jun Liu(刘文军)1,†, David Wei Zhang(张卫)1,2, and Shi-Jin Ding(丁士进)1,2,‡
1 State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai 200433, China; 2 National Integrated Circuit Innovation Center, Shanghai 201203, China
Abstract Amorphous In-Ga-Zn-O (a-IGZO) thin-film transistor (TFT) memories with novel p-SnO/n-SnO2 heterojunction charge trapping stacks (CTSs) are investigated comparatively under a maximum fabrication temperature of 280 ℃. Compared to a single p-SnO or n-SnO2 charge trapping layer (CTL), the heterojunction CTSs can achieve electrically programmable and erasable characteristics as well as good data retention. Of the two CTSs, the tunneling layer/p-SnO/n-SnO2/blocking layer architecture demonstrates much higher program efficiency, more robust data retention, and comparably superior erase characteristics. The resulting memory window is as large as 6.66 V after programming at 13 V/1 ms and erasing at -8 V/1 ms, and the ten-year memory window is extrapolated to be 4.41 V. This is attributed to shallow traps in p-SnO and deep traps in n-SnO2, and the formation of a built-in electric field in the heterojunction.
Wen Xiong(熊文), Jing-Yong Huo(霍景永), Xiao-Han Wu(吴小晗), Wen-Jun Liu(刘文军),David Wei Zhang(张卫), and Shi-Jin Ding(丁士进) High-performance amorphous In-Ga-Zn-O thin-film transistor nonvolatile memory with a novel p-SnO/n-SnO2 heterojunction charge trapping stack 2023 Chin. Phys. B 32 018503
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