Organic field-effect transistor floating-gate memory using polysilicon as charge trapping layer

doi:10.1088/1674-1056/28/8/086801

Abstract In this study, we present an organic field-effect transistor floating-gate memory using polysilicon (poly-Si) as a charge trapping layer. The memory device is fabricated on a N⁺-Si/SiO₂ substrate. Poly-Si, polymethylmethacrylate, and pentacene are used as a floating-gate layer, tunneling layer, and active layer, respectively. The device shows bidirectional storage characteristics under the action of programming/erasing (P/E) operation due to the supplied electrons and holes in the channel and the bidirectional charge trapping characteristic of the poly-Si floating-gate. The carrier mobility and switching current ratio (I_on/I_off ratio) of the device with a tunneling layer thickness of 85 nm are 0.01 cm²·V^-1·s^-1 and 10², respectively. A large memory window of 9.28 V can be obtained under a P/E voltage of ±60 V.

Keywords: organic floating-gate memory polysilicon floating-gate memory window

Received: 10 April 2019
Revised: 27 May 2019
Accepted manuscript online:

PACS:	68.35.bm	(Polymers, organics)
	72.20.Jv	(Charge carriers: generation, recombination, lifetime, and trapping)
	73.40.Gk	(Tunneling)
	73.90.+f	(Other topics in electronic structure and electrical properties of surfaces, interfaces, thin films, and low-dimensional structures)

Corresponding Authors: Jian-Hong Yang
E-mail: yangjh@lzu.edu.cn

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Wen-Ting Zhang(张文婷), Fen-Xia Wang(王粉霞), Yu-Miao Li(李玉苗), Xiao-Xing Guo(郭小星), Jian-Hong Yang(杨建红) Organic field-effect transistor floating-gate memory using polysilicon as charge trapping layer 2019 Chin. Phys. B 28 086801

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Organic field-effect transistor floating-gate memory using polysilicon as charge trapping layer

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