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Chin. Phys. B, 2022, Vol. 31(1): 018505    DOI: 10.1088/1674-1056/ac364d

Impact of symmetric gate-recess length on the DC and RF characteristics of InP HEMTs

Ruize Feng(封瑞泽)1,2, Bo Wang(王博)1,3, Shurui Cao(曹书睿)1,2, Tong Liu(刘桐)1, Yongbo Su(苏永波)1,2, Wuchang Ding(丁武昌)1,2, Peng Ding(丁芃)1,2,†, and Zhi Jin(金智)1,2,‡
1 High-Frequency High-Voltage Device and Integrated Circuits Center, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;
2 University of Chinese Academy of Sciences, Beijing 100029, China;
3 Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, Guilin 541004, China
Abstract  We fabricated a set of symmetric gate-recess devices with gate length of 70nm. We kept the source-to-drain spacing ($L_{SD}$) unchanged, and obtained a group of devices with gate-recess length $(L_{recess})$ from 0.4$\mu$m to 0.8$\mu$m through process improvement. In order to suppress the influence of the kink effect, we have done SiN$_{X}$ passivation treatment. The maximum saturation current density ($I_{D\_max}$) and maximum transconductance ($g_{m,max}$) increase as Lrecess decreases to 0.4$\mu$m. At this time, the device shows $I_{D\_max}=749.6$mA/mm at $V_{GS}=0.2$V, $V_{DS}=1.5$V, and $g_{m\_max}=1111$mS/mm at $V_{GS}=-0.35$V, $V_{DS}=1.5$V. Meanwhile, as $L_{recess}$ increases, it causes parasitic capacitance $C_{gd}$ and $g_{d}$ to decrease, making $f_{max}$ drastically increases. When Lrecess=0.8$\mu$m, the device shows $f_{T}=188$GHz and $f_{max}=1112$GHz.
Keywords:  InP HEMT      InGaAs/InAlAs      current gain cut-off frequency (fT)      maximum oscillation frequency (fmax)      gate-recess length (Lrecess)  
Received:  07 September 2021      Revised:  28 October 2021      Accepted manuscript online:  04 November 2021
PACS:  85.30.Tv (Field effect devices)  
  73.40.Qv (Metal-insulator-semiconductor structures (including semiconductor-to-insulator))  
  85.30.-z (Semiconductor devices)  
Fund: Project supported by the National Natural Science Foundation of China (Grant No. 61434006). The authors would like to thank Yan-kui Li for his assistance during the measurements. We are also grateful to all the members of HighFrequency High-Voltage Device and Integrated Circuits Center for their valuable help during the experiment.
Corresponding Authors:  Peng Ding, Zhi Jin     E-mail:;

Cite this article: 

Ruize Feng(封瑞泽), Bo Wang(王博), Shurui Cao(曹书睿), Tong Liu(刘桐), Yongbo Su(苏永波), Wuchang Ding(丁武昌), Peng Ding(丁芃), and Zhi Jin(金智) Impact of symmetric gate-recess length on the DC and RF characteristics of InP HEMTs 2022 Chin. Phys. B 31 018505

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