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A new algorithm based on C-V characteristics to extract the epitaxy layer parameters for power devices with the consideration of termination |
| Jiupeng Wu(吴九鹏)1, Na Ren(任娜)1,2,†, and Kuang Sheng(盛况)1 |
| 1 College of Electrical Engineering, Zhejiang University, Hangzhou 310027, China; 2 Hangzhou Innovation Center, Zhejiang University, Hangzhou 311200, China |
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Abstract Doping concentration and thickness of an epitaxy layer are the most essential parameters for power devices. The conventional algorithm extracts these two parameters by calculating the doping profile from its capacitance-voltage (C-V) characteristics. Such an algorithm treats the device as a parallel-plane junction and ignores the influence of the terminations. The epitaxy layer doping concentration tends to be overestimated and the thickness underestimated. In order to obtain the epitaxy layer parameters with higher accuracy, a new algorithm applicable for devices with field limited ring (FLR) terminations is proposed in this paper. This new algorithm is also based on the C-V characteristics and considers the extension manner of the depletion region under the FLR termination. Such an extension manner depends on the design parameters of the FLR termination and is studied in detail by simulation and modeling. The analytical expressions of the device C-V characteristics and the effective doping profile are derived. More accurate epitaxy layer parameters can be extracted by fitting the effective doping profile expression to the C-V doping profile calculated from the C-V characteristics. The relationship between the horizontal extension width and the vertical depth of the depletion region is also acquired. The credibility of the new algorithm is verified by experiments. The applicability of our new algorithm to FLR/field plate combining terminations is also discussed. Our new algorithm acts as a powerful tool for analyses and improvements of power devices.
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Received: 24 September 2020
Revised: 01 November 2020
Accepted manuscript online: 02 December 2020
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PACS:
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85.30.-z
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(Semiconductor devices)
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85.30.De
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(Semiconductor-device characterization, design, and modeling)
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84.30.Jc
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(Power electronics; power supply circuits)
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| Fund: Project supported by the National Key Research and Development Program of China (Grant No. 2018YFB0104701). |
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Corresponding Authors:
†Corresponding author. E-mail: ren_na@zju.edu.cn
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Cite this article:
Jiupeng Wu(吴九鹏), Na Ren(任娜), and Kuang Sheng(盛况) A new algorithm based on C-V characteristics to extract the epitaxy layer parameters for power devices with the consideration of termination 2021 Chin. Phys. B 30 048505
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