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Through-silicon-via crosstalk model and optimization design for three-dimensional integrated circuits |
Qian Li-Bo (钱利波)a, Zhu Zhang-Ming (朱樟明)b, Xia Yin-Shui (夏银水)a, Ding Rui-Xue (丁瑞雪)b, Yang Yin-Tang (杨银堂)b |
a School of Information Science and Engineering, Ningbo University, Ningbo 315211, China;
b School of Microelectronics, Xidian University, Key Laboratory of Wide Band-Gap Semiconductor Materials and Devices, Xi’an 710071, China |
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Abstract Through-silicon-via (TSV) to TSV crosstalk noise is one of the key factors affecting the signal integrity of three-dimensional integrated circuits (3D ICs). Based on the frequency dependent equivalent electrical parameters for the TSV channel, an analytical crosstalk noise model is established to capture the TSV induced crosstalk noise. The impact of various design parameters including insulation dielectric, via pitch, via height, silicon conductivity, and terminal impedance on the crosstalk noise is analyzed with the proposed model. Two approaches are proposed to alleviate the TSV noise, namely, driver sizing and via shielding, and the SPICE results show 241 mV and 379 mV reductions in the peak noise voltage, respectively.
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Received: 03 September 2013
Revised: 26 November 2013
Accepted manuscript online:
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PACS:
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84.30.-r
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(Electronic circuits)
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84.30.Bv
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(Circuit theory)
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Fund: Project supported by the National Natural Science Foundation of China (Grant Nos. 61131001, 61322405, 61204044, 61376039, and 61334003). |
Corresponding Authors:
Qian Li-Bo
E-mail: qianlibo@nbu.edu.cn
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Cite this article:
Qian Li-Bo (钱利波), Zhu Zhang-Ming (朱樟明), Xia Yin-Shui (夏银水), Ding Rui-Xue (丁瑞雪), Yang Yin-Tang (杨银堂) Through-silicon-via crosstalk model and optimization design for three-dimensional integrated circuits 2014 Chin. Phys. B 23 038402
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