A low specific on-resistance SOI LDMOS with a novel junction field plate

doi:10.1088/1674-1056/23/7/077306

›› 2014, Vol. 23 ›› Issue (7): 77306-077306.doi: 10.1088/1674-1056/23/7/077306

• CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES • 上一篇下一篇

A low specific on-resistance SOI LDMOS with a novel junction field plate

罗尹春^a, 罗小蓉^{a b}, 胡刚毅^b, 范远航^a, 李鹏程^a, 魏杰^a, 谭桥^a, 张波^a

a State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;
b Science and Technology on Analog Integrated Circuit Laboratory, Chongqing 400060, China

收稿日期:2013-12-18 修回日期:2014-01-21 出版日期:2014-07-15 发布日期:2014-07-15
基金资助:
Project supported by the National Natural Science Foundation of China (Grant No. 61376079), the Postdoctoral Science Foundation of China (Grant No. 2012T50771), and the Postdoctoral Science Foundation of Chongqing City, China (Grant No. XM2012004).

A low specific on-resistance SOI LDMOS with a novel junction field plate

Luo Yin-Chun (罗尹春)^a, Luo Xiao-Rong (罗小蓉)^{a b}, Hu Gang-Yi (胡刚毅)^b, Fan Yuan-Hang (范远航)^a, Li Peng-Cheng (李鹏程)^a, Wei Jie (魏杰)^a, Tan Qiao (谭桥)^a, Zhang Bo (张波)^a

a State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;
b Science and Technology on Analog Integrated Circuit Laboratory, Chongqing 400060, China

Received:2013-12-18 Revised:2014-01-21 Online:2014-07-15 Published:2014-07-15
Contact: Luo Xiao-Rong E-mail:xrluo@uestc.edu.cn
About author:73.40.Ty; 85.30.De; 85.30.Tv
Supported by:
Project supported by the National Natural Science Foundation of China (Grant No. 61376079), the Postdoctoral Science Foundation of China (Grant No. 2012T50771), and the Postdoctoral Science Foundation of Chongqing City, China (Grant No. XM2012004).

摘要/Abstract

摘要： A low specific on-resistance SOI LDMOS with a novel junction field plate (JFP) is proposed and investigated theoretically. The most significant feature of the JFP LDMOS is a PP-N junction field plate instead of a metal field plate. The unique structure not only yields charge compensation between the JFP and the drift region, but also modulates the surface electric field. In addition, a trench gate extends to the buried oxide layer (BOX) and thus widens the vertical conduction area. As a result, the breakdown voltage (BV) is improved and the specific on-resistance (R_on,sp) is decreased significantly. It is demonstrated that the BV of 306 V and the R_on,sp of 7.43 mΩ · cm² are obtained for the JFP LDMOS. Compared with those of the conventional LDMOS with the same dimensional parameters, the BV is improved by 34.8%, and the R_on,sp is decreased by 56.6% simultaneously. The proposed JFP LDMOS exhibits significant superiority in terms of the trade-off between BV and R_on,sp. The novel JFP technique offers an alternative technique to achieve high blocking voltage and large current capacity for power devices.

关键词: LDMOS, RESURF, field plate, breakdown voltage, specific on-resistance

Abstract: A low specific on-resistance SOI LDMOS with a novel junction field plate (JFP) is proposed and investigated theoretically. The most significant feature of the JFP LDMOS is a PP-N junction field plate instead of a metal field plate. The unique structure not only yields charge compensation between the JFP and the drift region, but also modulates the surface electric field. In addition, a trench gate extends to the buried oxide layer (BOX) and thus widens the vertical conduction area. As a result, the breakdown voltage (BV) is improved and the specific on-resistance (R_on,sp) is decreased significantly. It is demonstrated that the BV of 306 V and the R_on,sp of 7.43 mΩ · cm² are obtained for the JFP LDMOS. Compared with those of the conventional LDMOS with the same dimensional parameters, the BV is improved by 34.8%, and the R_on,sp is decreased by 56.6% simultaneously. The proposed JFP LDMOS exhibits significant superiority in terms of the trade-off between BV and R_on,sp. The novel JFP technique offers an alternative technique to achieve high blocking voltage and large current capacity for power devices.

Key words: LDMOS, RESURF, field plate, breakdown voltage, specific on-resistance

中图分类号: (Semiconductor-insulator-semiconductor structures)

73.40.Ty

85.30.De (Semiconductor-device characterization, design, and modeling) 85.30.Tv (Field effect devices)

罗尹春, 罗小蓉, 胡刚毅, 范远航, 李鹏程, 魏杰, 谭桥, 张波. A low specific on-resistance SOI LDMOS with a novel junction field plate[J]. , 2014, 23(7): 77306-077306.

Luo Yin-Chun (罗尹春), Luo Xiao-Rong (罗小蓉), Hu Gang-Yi (胡刚毅), Fan Yuan-Hang (范远航), Li Peng-Cheng (李鹏程), Wei Jie (魏杰), Tan Qiao (谭桥), Zhang Bo (张波). A low specific on-resistance SOI LDMOS with a novel junction field plate[J]. Chin. Phys. B, 2014, 23(7): 77306-077306.

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A low specific on-resistance SOI LDMOS with a novel junction field plate

A low specific on-resistance SOI LDMOS with a novel junction field plate

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