中国物理B ›› 2021, Vol. 30 ›› Issue (6): 67303-067303.doi: 10.1088/1674-1056/abdda7

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Terminal-optimized 700-V LDMOS with improved breakdown voltage and ESD robustness

Jie Xu(许杰)1, Nai-Long He(何乃龙)2, Hai-Lian Liang(梁海莲)1, Sen Zhang(张森)2, Yu-De Jiang(姜玉德)1, and Xiao-Feng Gu(顾晓峰)1,†   

  1. 1 Engineering Research Center of IoT Technology Applications(Ministry of Education), Department of Electronic Engineering, Jiangnan University, Wuxi 214122, China;
    2 Technology Development Department, CSMC Technologies Corporation, Wuxi 214061, China
  • 收稿日期:2020-10-28 修回日期:2021-01-07 接受日期:2021-01-20 出版日期:2021-05-18 发布日期:2021-06-01
  • 通讯作者: Xiao-Feng Gu E-mail:xgu@jiangnan.edu.cn
  • 基金资助:
    Project supported by the National Natural Science Foundation of China (Grant No. 61504049), the China Postdoctoral Science Foundation (Grant No. 2016M600361), and the Fundamental Research Funds for the Central Universities, China (Grant No. JUSRP51510).

Terminal-optimized 700-V LDMOS with improved breakdown voltage and ESD robustness

Jie Xu(许杰)1, Nai-Long He(何乃龙)2, Hai-Lian Liang(梁海莲)1, Sen Zhang(张森)2, Yu-De Jiang(姜玉德)1, and Xiao-Feng Gu(顾晓峰)1,†   

  1. 1 Engineering Research Center of IoT Technology Applications(Ministry of Education), Department of Electronic Engineering, Jiangnan University, Wuxi 214122, China;
    2 Technology Development Department, CSMC Technologies Corporation, Wuxi 214061, China
  • Received:2020-10-28 Revised:2021-01-07 Accepted:2021-01-20 Online:2021-05-18 Published:2021-06-01
  • Contact: Xiao-Feng Gu E-mail:xgu@jiangnan.edu.cn
  • Supported by:
    Project supported by the National Natural Science Foundation of China (Grant No. 61504049), the China Postdoctoral Science Foundation (Grant No. 2016M600361), and the Fundamental Research Funds for the Central Universities, China (Grant No. JUSRP51510).

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摘要： A novel terminal-optimized triple RESURF LDMOS (TOTR-LDMOS) is proposed and verified in a 0.25-μ bipolar-CMOS-DMOS (BCD) process. By introducing a low concentration region to the terminal region, the surface electric field of the TOTR-LDMOS decreases, helping to improve the breakdown voltage (BV) and electrostatic discharge (ESD) robustness. Both traditional LDMOS and TOTR-LDMOS are fabricated and investigated by transmission line pulse (TLP) tests, direct current (DC) tests, and TCAD simulations. The results show that comparing with the traditional LDMOS, the BV of the TOTR-LDMOS increases from 755 V to 817 V without affecting the specific on-resistance (Ron,sp) of 6.99 Ω·mm2. Meanwhile, the ESD robustness of the TOTR-LDMOS increases by 147%. The TOTR-LDMOS exhibits an excellent performance among the present 700-V LDMOS devices.

关键词: lateral double-diffused MOSFET (LDMOS), terminal-optimization, breakdown voltage, electrostatic discharge

Abstract: A novel terminal-optimized triple RESURF LDMOS (TOTR-LDMOS) is proposed and verified in a 0.25-μ bipolar-CMOS-DMOS (BCD) process. By introducing a low concentration region to the terminal region, the surface electric field of the TOTR-LDMOS decreases, helping to improve the breakdown voltage (BV) and electrostatic discharge (ESD) robustness. Both traditional LDMOS and TOTR-LDMOS are fabricated and investigated by transmission line pulse (TLP) tests, direct current (DC) tests, and TCAD simulations. The results show that comparing with the traditional LDMOS, the BV of the TOTR-LDMOS increases from 755 V to 817 V without affecting the specific on-resistance (Ron,sp) of 6.99 Ω·mm2. Meanwhile, the ESD robustness of the TOTR-LDMOS increases by 147%. The TOTR-LDMOS exhibits an excellent performance among the present 700-V LDMOS devices.

Key words: lateral double-diffused MOSFET (LDMOS), terminal-optimization, breakdown voltage, electrostatic discharge

中图分类号:  (Metal-insulator-semiconductor structures (including semiconductor-to-insulator))

  • 73.40.Qv
85.30.De (Semiconductor-device characterization, design, and modeling) 85.30.Tv (Field effect devices)