A threshold voltage analytical model for high-k gate dielectric MOSFETs with fully overlapped lightly doped drain structures

doi:10.1088/1674-1056/21/5/057304

中国物理B ›› 2012, Vol. 21 ›› Issue (5): 57304-057304.doi: 10.1088/1674-1056/21/5/057304

A threshold voltage analytical model for high-k gate dielectric MOSFETs with fully overlapped lightly doped drain structures

马飞,刘红侠,匡潜玮,樊继斌

Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Material and Devices, School of Microelectronics, Xidian University, Xi'an 710071, China

收稿日期:2011-09-07 修回日期:2012-04-27 出版日期:2012-04-01 发布日期:2012-04-01
基金资助:
Project supported by the National Natural Science Foundation of China (Grant Nos. 60936005 and 61076097), the Cultivation Fund of the Key Scientific and Technical Innovation Project, Ministry of Education of China (Grant No. 708083), and the Fundamental Research Funds for the Central Universities of China (Grant No. 20110203110012).

A threshold voltage analytical model for high-k gate dielectric MOSFETs with fully overlapped lightly doped drain structures

Ma Fei(马飞)^†, Liu Hong-Xia(刘红侠), Kuang Qian-Wei(匡潜玮), and Fan Ji-Bin(樊继斌)

Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Material and Devices, School of Microelectronics, Xidian University, Xi'an 710071, China

Received:2011-09-07 Revised:2012-04-27 Online:2012-04-01 Published:2012-04-01
Supported by:
Project supported by the National Natural Science Foundation of China (Grant Nos. 60936005 and 61076097), the Cultivation Fund of the Key Scientific and Technical Innovation Project, Ministry of Education of China (Grant No. 708083), and the Fundamental Research Funds for the Central Universities of China (Grant No. 20110203110012).

摘要/Abstract

摘要： We investigate the influence of voltage drop across the lightly doped drain (LDD) region and the built-in potential on MOSFETs, and develop a threshold voltage model for high-k gate dielectric MOSFETs with fully overlapped LDD structures by solving the two-dimensional Poisson's equation in the silicon and gate dielectric layers. The model can predict the fringing-induced barrier lowering effect and the short channel effect. It is also valid for non-LDD MOSFETs. Based on this model, the relationship between threshold voltage roll-off and three parameters, channel length, drain voltage and gate dielectric permittivity, is investigated. Compared with the non-LDD MOSFET, the LDD MOSFET depends slightly on channel length, drain voltage, and gate dielectric permittivity. The model is verified at the end of the paper.

关键词: threshold voltage, high-k gate dielectric, fringing-induced barrier lowering, short channel effect

Abstract: We investigate the influence of voltage drop across the lightly doped drain (LDD) region and the built-in potential on MOSFETs, and develop a threshold voltage model for high-k gate dielectric MOSFETs with fully overlapped LDD structures by solving the two-dimensional Poisson's equation in the silicon and gate dielectric layers. The model can predict the fringing-induced barrier lowering effect and the short channel effect. It is also valid for non-LDD MOSFETs. Based on this model, the relationship between threshold voltage roll-off and three parameters, channel length, drain voltage and gate dielectric permittivity, is investigated. Compared with the non-LDD MOSFET, the LDD MOSFET depends slightly on channel length, drain voltage, and gate dielectric permittivity. The model is verified at the end of the paper.

Key words: threshold voltage, high-k gate dielectric, fringing-induced barrier lowering, short channel effect

中图分类号: (Metal-insulator-semiconductor structures (including semiconductor-to-insulator))

73.40.Qv

73.40.Lq (Other semiconductor-to-semiconductor contacts, p-n junctions, and heterojunctions) 12.39.Pn (Potential models)

马飞, 刘红侠, 匡潜玮, 樊继斌. A threshold voltage analytical model for high-k gate dielectric MOSFETs with fully overlapped lightly doped drain structures[J]. 中国物理B, 2012, 21(5): 57304-057304.

Ma Fei(马飞), Liu Hong-Xia(刘红侠), Kuang Qian-Wei(匡潜玮), and Fan Ji-Bin(樊继斌) . A threshold voltage analytical model for high-k gate dielectric MOSFETs with fully overlapped lightly doped drain structures[J]. Chin. Phys. B, 2012, 21(5): 57304-057304.

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A threshold voltage analytical model for high-k gate dielectric MOSFETs with fully overlapped lightly doped drain structures

A threshold voltage analytical model for high-k gate dielectric MOSFETs with fully overlapped lightly doped drain structures

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