Research on SEE mitigation techniques using back junction and p+ buffer layer in domestic non-DTI SiGe HBTs by TCAD

doi:10.1088/1674-1056/28/6/068503

中国物理B ›› 2019, Vol. 28 ›› Issue (6): 68503-068503.doi: 10.1088/1674-1056/28/6/068503

• INTERDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY • 上一篇下一篇

Research on SEE mitigation techniques using back junction and p⁺ buffer layer in domestic non-DTI SiGe HBTs by TCAD

Jia-Nan Wei(魏佳男), Chao-Hui He(贺朝会), Pei Li(李培), Yong-Hong Li(李永宏)

School of Nuclear Science and Technology, Xi'an Jiaotong University, Xi'an 710049, China

收稿日期:2019-03-06 修回日期:2019-04-01 出版日期:2019-06-05 发布日期:2019-06-05
通讯作者: Chao-Hui He E-mail:hechaohui@mail.xjtu.edu.cn
基金资助:
Project supported by the National Natural Science Foundation of China (Grant Nos. 11775167, 11575138, and 11835006).

Research on SEE mitigation techniques using back junction and p⁺ buffer layer in domestic non-DTI SiGe HBTs by TCAD

Jia-Nan Wei(魏佳男), Chao-Hui He(贺朝会), Pei Li(李培), Yong-Hong Li(李永宏)

School of Nuclear Science and Technology, Xi'an Jiaotong University, Xi'an 710049, China

Received:2019-03-06 Revised:2019-04-01 Online:2019-06-05 Published:2019-06-05
Contact: Chao-Hui He E-mail:hechaohui@mail.xjtu.edu.cn
Supported by:
Project supported by the National Natural Science Foundation of China (Grant Nos. 11775167, 11575138, and 11835006).

摘要/Abstract

摘要：

In this paper we investigate two techniques for single event effect (SEE) mitigation by using back junction and p⁺ buffer layer in non-deep trench isolation (DTI) domestic silicon-germanium heterojunction bipolar transistors (SiGe HBTs) based on technology computer aided design (TCAD) simulation. The effectiveness of the two mitigation techniques and the influence of various structure parameters are investigated. Simulation results indicate that the two techniques are more effective in reducing collector charge collection induced by heavy ions striking at positions outside the collector-substrate (C-S) junction where charge collection is dominated by diffusion. By properly adjusting the parameters, charge collection of events outside the C-S junction can be reduced by more than an order of magnitude, while charge collection of events in the device center is halved without affecting the direct current (DC) and alternating current (AC) characteristics of the SiGe HBTs.

关键词: silicon-germanium HBT, single event effect, mitigation technique, TCAD simulation

Abstract:

Key words: silicon-germanium HBT, single event effect, mitigation technique, TCAD simulation

中图分类号: (Bipolar transistors)

85.30.Pq

61.80.Jh (Ion radiation effects) 61.80.Az (Theory and models of radiation effects)

魏佳男, 贺朝会, 李培, 李永宏. Research on SEE mitigation techniques using back junction and p⁺ buffer layer in domestic non-DTI SiGe HBTs by TCAD[J]. 中国物理B, 2019, 28(6): 68503-068503.

Jia-Nan Wei(魏佳男), Chao-Hui He(贺朝会), Pei Li(李培), Yong-Hong Li(李永宏). Research on SEE mitigation techniques using back junction and p⁺ buffer layer in domestic non-DTI SiGe HBTs by TCAD[J]. Chin. Phys. B, 2019, 28(6): 68503-068503.

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Research on SEE mitigation techniques using back junction and p⁺ buffer layer in domestic non-DTI SiGe HBTs by TCAD

Research on SEE mitigation techniques using back junction and p⁺ buffer layer in domestic non-DTI SiGe HBTs by TCAD

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