Investigation of gate oxide traps effect on NAND flash memory by TCAD simulation

doi:10.1088/1674-1056/ab695f

中国物理B ›› 2020, Vol. 29 ›› Issue (3): 38501-038501.doi: 10.1088/1674-1056/ab695f

• INTERDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY • 上一篇下一篇

Investigation of gate oxide traps effect on NAND flash memory by TCAD simulation

He-Kun Zhang(章合坤), Xuan Tian(田璇), Jun-Peng He(何俊鹏), Zhe Song(宋哲), Qian-Qian Yu(蔚倩倩), Liang Li(李靓), Ming Li(李明), Lian-Cheng Zhao(赵连城), Li-Ming Gao(高立明)

1 School of Materials Science and Engineering, Shanghai Jiao Tong University, Shanghai 200240, China;
2 SanDisk Info Tech Shanghai, Shanghai 200241, China

收稿日期:2019-10-15 修回日期:2019-12-30 出版日期:2020-03-05 发布日期:2020-03-05
通讯作者: Li-Ming Gao E-mail:liming.gao@sjtu.edu.cn
基金资助:
Project supported by the SanDisk Info Tech Shanghai, China and the Institute of Microelectronic Materials & Technology, School of Materials Science and Engineering, Shanghai Jiao Tong University, China.

Investigation of gate oxide traps effect on NAND flash memory by TCAD simulation

He-Kun Zhang(章合坤)¹, Xuan Tian(田璇)², Jun-Peng He(何俊鹏)¹, Zhe Song(宋哲)², Qian-Qian Yu(蔚倩倩)², Liang Li(李靓)², Ming Li(李明)¹, Lian-Cheng Zhao(赵连城)¹, Li-Ming Gao(高立明)¹

1 School of Materials Science and Engineering, Shanghai Jiao Tong University, Shanghai 200240, China;
2 SanDisk Info Tech Shanghai, Shanghai 200241, China

Received:2019-10-15 Revised:2019-12-30 Online:2020-03-05 Published:2020-03-05
Contact: Li-Ming Gao E-mail:liming.gao@sjtu.edu.cn
Supported by:
Project supported by the SanDisk Info Tech Shanghai, China and the Institute of Microelectronic Materials & Technology, School of Materials Science and Engineering, Shanghai Jiao Tong University, China.

摘要/Abstract

摘要： The effects of gate oxide traps on gate leakage current and device performance of metal-oxide-nitride-oxide-silicon (MONOS)-structured NAND flash memory are investigated through Sentaurus TCAD. The trap-assisted tunneling (TAT) model is implemented to simulate the leakage current of MONOS-structured memory cell. In this study, trap position, trap density, and trap energy are systematically analyzed for ascertaining their influences on gate leakage current, program/erase speed, and data retention properties. The results show that the traps in blocking layer significantly enhance the gate leakage current and also facilitates the cell program/erase. Trap density ~10¹⁸ cm^-3 and trap energy ~1 eV in blocking layer can considerably improve cell program/erase speed without deteriorating data retention. The result conduces to understanding the role of gate oxide traps in cell degradation of MONOS-structured NAND flash memory.

关键词: NAND flash reliability, gate oxide traps, trap-assisted tunneling, TCAD simulation

Abstract: The effects of gate oxide traps on gate leakage current and device performance of metal-oxide-nitride-oxide-silicon (MONOS)-structured NAND flash memory are investigated through Sentaurus TCAD. The trap-assisted tunneling (TAT) model is implemented to simulate the leakage current of MONOS-structured memory cell. In this study, trap position, trap density, and trap energy are systematically analyzed for ascertaining their influences on gate leakage current, program/erase speed, and data retention properties. The results show that the traps in blocking layer significantly enhance the gate leakage current and also facilitates the cell program/erase. Trap density ~10¹⁸ cm^-3 and trap energy ~1 eV in blocking layer can considerably improve cell program/erase speed without deteriorating data retention. The result conduces to understanding the role of gate oxide traps in cell degradation of MONOS-structured NAND flash memory.

Key words: NAND flash reliability, gate oxide traps, trap-assisted tunneling, TCAD simulation

中图分类号: (Superconducting logic elements and memory devices; microelectronic circuits)

85.25.Hv

85.40.-e (Microelectronics: LSI, VLSI, ULSI; integrated circuit fabrication technology) 85.35.Gv (Single electron devices)

章合坤, 田璇, 何俊鹏, 宋哲, 蔚倩倩, 李靓, 李明, 赵连城, 高立明. Investigation of gate oxide traps effect on NAND flash memory by TCAD simulation[J]. 中国物理B, 2020, 29(3): 38501-038501.

He-Kun Zhang(章合坤), Xuan Tian(田璇), Jun-Peng He(何俊鹏), Zhe Song(宋哲), Qian-Qian Yu(蔚倩倩), Liang Li(李靓), Ming Li(李明), Lian-Cheng Zhao(赵连城), Li-Ming Gao(高立明). Investigation of gate oxide traps effect on NAND flash memory by TCAD simulation[J]. Chin. Phys. B, 2020, 29(3): 38501-038501.

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Investigation of gate oxide traps effect on NAND flash memory by TCAD simulation

Investigation of gate oxide traps effect on NAND flash memory by TCAD simulation

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