Lead zirconate titanate behaviors in LDMOS

doi:10.1088/1674-1056/22/7/078501

Abstract The behaviors of lead zirconate titanate (PZT) deposited as the dielectric for high-voltage devices are investigated experimentally and theoretically. The devices demonstrate not only high breakdown voltages above 350 V, but also excellent memory behaviors. A drain current-gate voltage (I_D-V_G) memory window of about 2.2 V is obtained at the sweep voltages of ± 10 V for the 350-V laterally diffused metal oxide semiconductor (LDMOS). The retention time of about 270 s is recorded for the LDMOS through a controlled I_D-V_G measurement. The LDMOS with memory behaviors has potential to be applied in future power conversion circuits to boost the performance of the energy conversion system.

Keywords: laterally diffused metal oxide semiconductor (LDMOS) lead zirconate titanate memory behavior retention

Received: 19 December 2012
Revised: 04 February 2013
Accepted manuscript online:

PACS:	85.30.De	(Semiconductor-device characterization, design, and modeling)
	85.50.-n	(Dielectric, ferroelectric, and piezoelectric devices)
	77.55.df	(For silicon electronics)

Fund: Project supported by the National Basic Research Program of China (Grant No. 50772019) and the National Natural Science Foundation of China (Grant No. 61204084).

Corresponding Authors: Zhai Ya-Hong
E-mail: yhzhai@uestc.edu.cn

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Zhai Ya-Hong (翟亚红), Li Wei (李威), Li Ping (李平), Li Jun-Hong (李俊宏), Hu Bin (胡滨), Huo Wei-Rong (霍伟荣), Fan Xue (范雪), Wang Gang (王刚) Lead zirconate titanate behaviors in LDMOS 2013 Chin. Phys. B 22 078501

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Lead zirconate titanate behaviors in LDMOS

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