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Chin. Phys. B, 2015, Vol. 24(12): 127304    DOI: 10.1088/1674-1056/24/12/127304
CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES Prev   Next  

High-k gate dielectric GaAs MOS device with LaON as interlayer and NH3-plasma surface pretreatment

Liu Chao-Wen (刘超文), Xu Jing-Ping (徐静平), Liu Lu (刘璐), Lu Han-Han (卢汉汉)
School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074, China
Abstract  

High-k gate dielectric HfTiON GaAs metal-oxide-semiconductor (MOS) capacitors with LaON as interfacial passivation layer (IPL) and NH3-or N2-plasma surface pretreatment are fabricated, and their interfacial and electrical properties are investigated and compared with their counterparts that have neither LaON IPL nor surface treatment. It is found that good interface quality and excellent electrical properties can be achieved for a NH3-plasma pretreated GaAs MOS device with a stacked gate dielectric of HfTiON/LaON. These improvements should be ascribed to the fact that the NH3-plasma can provide H atoms and NH radicals that can effectively remove defective Ga/As oxides. In addition, LaON IPL can further block oxygen atoms from being in-diffused, and Ga and As atoms from being out-diffused from the substrate to the high-k dielectric. This greatly suppresses the formation of Ga/As native oxides and gives rise to an excellent high-k/GaAs interface.

Keywords:  GaAs MOS      LaON interlayer      NH3-plasma treatment      stacked gate dielectric  
Received:  28 July 2015      Revised:  25 August 2015      Accepted manuscript online: 
PACS:  73.40.Qv (Metal-insulator-semiconductor structures (including semiconductor-to-insulator))  
  73.40.Kp (III-V semiconductor-to-semiconductor contacts, p-n junctions, and heterojunctions)  
  73.61.Ey (III-V semiconductors)  
Fund: 

Project supported by the National Natural Science Foundation of China (Grant Nos. 61176100 and 61274112).

Corresponding Authors:  Xu Jing-Ping     E-mail:  jpxu@hust.edu.cn

Cite this article: 

Liu Chao-Wen (刘超文), Xu Jing-Ping (徐静平), Liu Lu (刘璐), Lu Han-Han (卢汉汉) High-k gate dielectric GaAs MOS device with LaON as interlayer and NH3-plasma surface pretreatment 2015 Chin. Phys. B 24 127304

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