Investigation of the characteristics of GIDL current in 90nm CMOS technology

doi:10.1088/1009-1963/15/3/034

Abstract

Abstract A specially designed experiment is performed for investigating gate-induced drain leakage (GIDL) current in 90nm CMOS technology using lightly-doped drain (LDD) NMOSFET. This paper shows that the drain bias

V_{D}

has a strong effect on GIDL current as compared with the gate bias

V_{G}

at the same drain--gate voltage

V_{D G}

. It is found that the difference between

I_{D}

in the off-state

I_{D} - V_{G}

characteristics and the corresponding one in the off-state

I_{D} - V_{D}

characteristics, which is defined as

I_{D I F F}

, versus

V_{D G}

shows a peak. The difference between the influences of

V_{D}

and

V_{G}

on GIDL current is shown quantitatively by

I_{D I F F}

, especially in 90nm scale. The difference is due to different hole tunnellings. Furthermore, the maximum

I_{D I F F}

(

I_{D I F F, M A X})

varies linearly with

V_{D G}

in logarithmic coordinates and also

V_{D G}

at

I_{D I F F, M A X}

with

V_{F}

which is the characteristic voltage of

I_{D I F F}

. The relations are studied and some related expressions are given.

Keywords: GIDL 90nm CMOS technology band-to-band tunnelling

Received: 17 August 2005
Revised: 16 December 2005
Accepted manuscript online:

PACS:	85.30.De	(Semiconductor-device characterization, design, and modeling)
	85.30.Tv	(Field effect devices)
	85.40.-e	(Microelectronics: LSI, VLSI, ULSI; integrated circuit fabrication technology)
	73.40.Gk	(Tunneling)

Fund: Project supported by the National High Technology Research and Development Program of China (Grant No 2003AA1Z1630) and the National Natural Science Foundation of China (Grant No 60376024).

Cite this article:

Chen Hai-Feng (陈海峰), Hao Yue (郝跃), Ma Xiao-Hua (马晓华), Zhang Jin-Cheng (张进城), Li Kang (李康), Cao Yan-Rong (曹艳荣), Zhang Jin-Feng (张金凤), Zhou Peng-Ju (周鹏举) Investigation of the characteristics of GIDL current in 90nm CMOS technology 2006 Chinese Physics 15 645

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