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Chin. Phys. B, 2015, Vol. 24(10): 108503    DOI: 10.1088/1674-1056/24/10/108503
INTERDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY Prev   Next  

A novel diode string triggered gated-PiN junction device for electrostatic discharge protection in 65-nm CMOS technology

Zhang Li-Zhong, Wang Yuan, Lu Guang-Yi, Cao Jian, Zhang Xing
Institute of Microelectronics, Peking University, Beijing 100871, China
Abstract  A novel diode string-triggered gated-PiN junction device, which is fabricated in a standard 65-nm complementary metal-oxide semiconductor (CMOS) technology, is proposed in this paper. An embedded gated-PiN junction structure is employed to reduce the diode string leakage current to 13 nA/μ in a temperature range from 25 ℃ to 85 ℃. To provide the effective electrostatic discharge (ESD) protection in multi-voltage power supply, the triggering voltage of the novel device can be adjusted through redistributing parasitic resistance instead of changing the stacked diode number.
Keywords:  electrostatic discharge (ESD)      gated-PiN junction      diode string      parasitic resistance redistribution  
Received:  28 January 2015      Revised:  20 April 2015      Published:  05 October 2015
PACS:  85.30.Kk (Junction diodes)  
  85.30.Mn (Junction breakdown and tunneling devices (including resonance tunneling devices))  
  41.20.Cv (Electrostatics; Poisson and Laplace equations, boundary-value problems)  
  52.35.Fp (Electrostatic waves and oscillations (e.g., ion-acoustic waves))  
Fund: Project supported by the National Basic Research Program of China (Grant No. 2011CBA00606).
Corresponding Authors:  Wang Yuan     E-mail:  wangyuan@pku.edu.cn

Cite this article: 

Zhang Li-Zhong, Wang Yuan, Lu Guang-Yi, Cao Jian, Zhang Xing A novel diode string triggered gated-PiN junction device for electrostatic discharge protection in 65-nm CMOS technology 2015 Chin. Phys. B 24 108503

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