A novel diode string triggered gated-PiN junction device for electrostatic discharge protection in 65-nm CMOS technology

doi:10.1088/1674-1056/24/10/108503

Abstract A novel diode string-triggered gated-PiN junction device, which is fabricated in a standard 65-nm complementary metal-oxide semiconductor (CMOS) technology, is proposed in this paper. An embedded gated-PiN junction structure is employed to reduce the diode string leakage current to 13 nA/μ in a temperature range from 25 ℃ to 85 ℃. To provide the effective electrostatic discharge (ESD) protection in multi-voltage power supply, the triggering voltage of the novel device can be adjusted through redistributing parasitic resistance instead of changing the stacked diode number.

Keywords: electrostatic discharge (ESD) gated-PiN junction diode string parasitic resistance redistribution

Received: 28 January 2015
Revised: 20 April 2015
Published: 05 October 2015

PACS:	85.30.Kk	(Junction diodes)
	85.30.Mn	(Junction breakdown and tunneling devices (including resonance tunneling devices))
	41.20.Cv	(Electrostatics; Poisson and Laplace equations, boundary-value problems)
	52.35.Fp	(Electrostatic waves and oscillations (e.g., ion-acoustic waves))

Fund: Project supported by the National Basic Research Program of China (Grant No. 2011CBA00606).

Corresponding Authors: Wang Yuan
E-mail: wangyuan@pku.edu.cn

Cite this article:

Zhang Li-Zhong, Wang Yuan, Lu Guang-Yi, Cao Jian, Zhang Xing A novel diode string triggered gated-PiN junction device for electrostatic discharge protection in 65-nm CMOS technology 2015 Chin. Phys. B 24 108503

[1]	Liou J J 2012 Proc. 28th Int. Conf. Microelectronics (MIEL) NIS, May 13-16, 2012, Serbia, p. 11
[2]	Wang Y, Jia S, Sun L, Zhang G G, Zhang X and Ji L J 2007 Acta Phys. Sin. 56 7242(in Chinese)
[3]	Dabral S, Aslett R and Maloney T J 1994 J. Electrostatics. 33 3
[4]	Maloney T J and Dabral S 1996 IEEE Trans. Compon. Packag. Manuf. Technol. Part C 19 3
[5]	Voldman S H and Gerosa G 1994 IEEE Int. Electron Devices Meet. (IEDM), December 11-14, 1994, San Francisco, USA, p. 277
[6]	Voldman S H, Gerosa G, Gross V P, Dickson N, Furkay S and Slinkman J 1995 Proc. EOS/ESD Symp. Phoenix, September 12-14, 1995, USA, p. 43
[7]	Chen S S, Chen T Y, Tang T H, Su J L, Shen T M and Chen J K 2003 IEEE Trans. Electron Dev. 24 9
[8]	Barth J E, Verhaege K, Henry L G and Richner J 2001 IEEE Trans. Electron. Packag. Manuf. 24 2
[9]	Mantl S, Knoll L, Schmidt M, Richter S, Nichau A, Trel-lenkamp S, Schafer A, Wirths S, Blaeser S, Buca D and Zhao Q T 2013 International Conference on Ultimate Integration on Silicon, March 19-21, 2013, Coventry, United Kingdom, p. 15
[10]	Choi W Y, Park B G, Lee J D and Liu T J K 2007 IEEE Electron Dev. Lett. 28 743
[11]	Wang Y, Zhang L Z, Cao J, Lu G Y, Jia S and Zhang X 2014 Acta Phys. Sin. 63 178501 (in Chinese)

[1]	Enhanced gated-diode-triggered silicon-controlled rectifier for robust electrostatic discharge (ESD) protection applications Wenqiang Song(宋文强), Fei Hou(侯飞), Feibo Du(杜飞波), Zhiwei Liu(刘志伟), Juin J. Liou(刘俊杰). Chin. Phys. B, 2020, 29(9): 098502.
[2]	Structure-dependent behaviors of diode-triggered silicon controlled rectifier under electrostatic discharge stress Li-Zhong Zhang(张立忠), Yuan Wang(王源), Yan-Dong He(何燕冬). Chin. Phys. B, 2016, 25(12): 128501.

No Suggested Reading articles found!

Viewed

Full text

Abstract

Cited

Shared

Discussed

Metrics
Related Articles