中国物理B ›› 2019, Vol. 28 ›› Issue (3): 37201-037201.doi: 10.1088/1674-1056/28/3/037201

• CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES • 上一篇    下一篇

Stacked lateral double-diffused metal-oxide-semiconductor field effect transistor with enhanced depletion effect by surface substrate

Qi Li(李琦), Zhao-Yang Zhang(张昭阳), Hai-Ou Li(李海鸥), Tang-You Sun(孙堂友), Yong-He Chen(陈永和), Yuan Zuo(左园)   

  1. Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, Guilin 541004, China
  • 收稿日期:2018-09-11 修回日期:2018-12-18 出版日期:2019-03-05 发布日期:2019-03-05
  • 通讯作者: Yuan Zuo E-mail:juear615@outlook.com
  • 基金资助:

    Project supported by the National Natural Science Foundation of China (Grant No. 61464003) and the Guangxi Natural Science Foundation, China (Grant Nos. 2015GXNSFAA139300 and 2018JJA170010).

Stacked lateral double-diffused metal-oxide-semiconductor field effect transistor with enhanced depletion effect by surface substrate

Qi Li(李琦), Zhao-Yang Zhang(张昭阳), Hai-Ou Li(李海鸥), Tang-You Sun(孙堂友), Yong-He Chen(陈永和), Yuan Zuo(左园)   

  1. Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, Guilin 541004, China
  • Received:2018-09-11 Revised:2018-12-18 Online:2019-03-05 Published:2019-03-05
  • Contact: Yuan Zuo E-mail:juear615@outlook.com
  • Supported by:

    Project supported by the National Natural Science Foundation of China (Grant No. 61464003) and the Guangxi Natural Science Foundation, China (Grant Nos. 2015GXNSFAA139300 and 2018JJA170010).

摘要:

A stacked lateral double-diffused metal-oxide-semiconductor field-effect transistor (LDMOS) with enhanced depletion effect by surface substrate is proposed (ST-LDMOS), which is compatible with the traditional CMOS processes. The new stacked structure is characterized by double substrates and surface dielectric trenches (SDT). The drift region is separated by the P-buried layer to form two vertically parallel devices. The doping concentration of the drift region is increased benefiting from the enhanced auxiliary depletion effect of the double substrates, leading to a lower specific on-resistance (Ron,sp). Multiple electric field peaks appear at the corners of the SDT, which improves the lateral electric field distribution and the breakdown voltage (BV). Compared to a conventional LDMOS (C-LDMOS), the BV in the ST-LDMOS increases from 259 V to 459 V, an improvement of 77.22%. The Ron,sp decreases from 39.62 mΩ·cm2 to 23.24 mΩ·cm2 and the Baliga's figure of merit (FOM) of is 9.07 MW/cm2.

关键词: double substrates, surface dielectric trench, stacked lateral double-diffused metal-oxide-semiconductor field-effect transistor (ST-LDMOS), breakdown voltage

Abstract:

A stacked lateral double-diffused metal-oxide-semiconductor field-effect transistor (LDMOS) with enhanced depletion effect by surface substrate is proposed (ST-LDMOS), which is compatible with the traditional CMOS processes. The new stacked structure is characterized by double substrates and surface dielectric trenches (SDT). The drift region is separated by the P-buried layer to form two vertically parallel devices. The doping concentration of the drift region is increased benefiting from the enhanced auxiliary depletion effect of the double substrates, leading to a lower specific on-resistance (Ron,sp). Multiple electric field peaks appear at the corners of the SDT, which improves the lateral electric field distribution and the breakdown voltage (BV). Compared to a conventional LDMOS (C-LDMOS), the BV in the ST-LDMOS increases from 259 V to 459 V, an improvement of 77.22%. The Ron,sp decreases from 39.62 mΩ·cm2 to 23.24 mΩ·cm2 and the Baliga's figure of merit (FOM) of is 9.07 MW/cm2.

Key words: double substrates, surface dielectric trench, stacked lateral double-diffused metal-oxide-semiconductor field-effect transistor (ST-LDMOS), breakdown voltage

中图分类号:  (Elemental semiconductors)

  • 72.80.Cw
73.40.Qv (Metal-insulator-semiconductor structures (including semiconductor-to-insulator))