中国物理B ›› 2017, Vol. 26 ›› Issue (8): 87304-087304.doi: 10.1088/1674-1056/26/8/087304

• CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES • 上一篇    下一篇

Stress-induced leakage current characteristics of PMOS fabricated by a new multi-deposition multi-annealing technique with full gate last process

Yanrong Wang(王艳蓉), Hong Yang(杨红), Hao Xu(徐昊), Weichun Luo(罗维春), Luwei Qi(祁路伟), Shuxiang Zhang(张淑祥), Wenwu Wang(王文武), Jiang Yan(闫江), Huilong Zhu(朱慧珑), Chao Zhao(赵超), Dapeng Chen(陈大鹏), Tianchun Ye(叶甜春)   

  1. 1 Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of MicroElectronics, Chinese Academy of Sciences, Beijing 100029, China;
    2 North China University of Technology, Beijing 100144, China;
    3 University of Chinese Academy of Sciences, Beijing 100049, China
  • 收稿日期:2017-05-02 修回日期:2017-05-05 出版日期:2017-08-05 发布日期:2017-08-05
  • 通讯作者: Wenwu Wang E-mail:wangwenwu@ime.ac.cn
  • 基金资助:

    Project supported by the National High Technology Research and Development Program of China (Grant No. 2015AA016501) and the National Natural Science Foundation of China (Grant No. 61306129).

Stress-induced leakage current characteristics of PMOS fabricated by a new multi-deposition multi-annealing technique with full gate last process

Yanrong Wang(王艳蓉)1,2,3, Hong Yang(杨红)1,3, Hao Xu(徐昊)1,3, Weichun Luo(罗维春)1,3, Luwei Qi(祁路伟)1,3, Shuxiang Zhang(张淑祥)1,3, Wenwu Wang(王文武)1,3, Jiang Yan(闫江)2, Huilong Zhu(朱慧珑)1,3, Chao Zhao(赵超)1,3, Dapeng Chen(陈大鹏)1,3, Tianchun Ye(叶甜春)1,3   

  1. 1 Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of MicroElectronics, Chinese Academy of Sciences, Beijing 100029, China;
    2 North China University of Technology, Beijing 100144, China;
    3 University of Chinese Academy of Sciences, Beijing 100049, China
  • Received:2017-05-02 Revised:2017-05-05 Online:2017-08-05 Published:2017-08-05
  • Contact: Wenwu Wang E-mail:wangwenwu@ime.ac.cn
  • About author:0.1088/1674-1056/26/8/
  • Supported by:

    Project supported by the National High Technology Research and Development Program of China (Grant No. 2015AA016501) and the National Natural Science Foundation of China (Grant No. 61306129).

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摘要：

In the process of high-k films fabrication, a novel multi deposition multi annealing (MDMA) technique is introduced to replace simple post deposition annealing. The leakage current decreases with the increase of the post deposition annealing (PDA) times. The equivalent oxide thickness (EOT) decreases when the annealing time(s) change from 1 to 2. Furthermore, the characteristics of SILC (stress-induced leakage current) for an ultra-thin SiO2/HfO2 gate dielectric stack are studied systematically. The increase of the PDA time(s) from 1 to 2 can decrease the defect and defect generation rate in the HK layer. However, increasing the PDA times to 4 and 7 may introduce too much oxygen, therefore the type of oxygen vacancy changes.

关键词: high-k/metal gate, multi deposition multi annealing, stress-induced leakage current, post deposition annealing

Abstract:

In the process of high-k films fabrication, a novel multi deposition multi annealing (MDMA) technique is introduced to replace simple post deposition annealing. The leakage current decreases with the increase of the post deposition annealing (PDA) times. The equivalent oxide thickness (EOT) decreases when the annealing time(s) change from 1 to 2. Furthermore, the characteristics of SILC (stress-induced leakage current) for an ultra-thin SiO2/HfO2 gate dielectric stack are studied systematically. The increase of the PDA time(s) from 1 to 2 can decrease the defect and defect generation rate in the HK layer. However, increasing the PDA times to 4 and 7 may introduce too much oxygen, therefore the type of oxygen vacancy changes.

Key words: high-k/metal gate, multi deposition multi annealing, stress-induced leakage current, post deposition annealing

中图分类号:  (Metal-insulator-semiconductor structures (including semiconductor-to-insulator))

  • 73.40.Qv
85.30.Tv (Field effect devices)