An interconnect width and spacing optimization model considering scattering effect

doi:10.1088/1674-1056/19/9/097803

Abstract As the feature size of the CMOS integrated circuit continues to shrink, the more and more serious scattering effect has a serious impact on interconnection performance, such as delay and bandwidth. Based on the impact of the scattering effect on latency and bandwidth, this paper first presents the quality-factor model which optimises latency and bandwidth effectively with the consideration of the scattering effect. Then we obtain the analytical model of line width and spacing with application of curve-fitting method. The proposed model has been verified and compared based on the nano-scale CMOS technology. This optimisation model algorithm is simple and can be applied to the interconnection system optimal design of nano-scale integrated circuits.

Keywords: scattering effect curve fitting interconnection line dimensions nanometer integrated circuits

Received: 29 November 2009
Revised: 22 January 2010
Accepted manuscript online:

PACS:

7850G

Fund: Project supported by the National Natural Science Foundation of China (Grant Nos. 60725415 and 60971066), the National High-tech Program (Grant Nos. 2009AA01Z258 and 2009AA01Z260), and the National Key Lab Foundation (Grant No. ZHD200904).

Cite this article:

Zhu Zhang-Ming(朱樟明), Wan Da-Jing(万达经), and Yang Yin-Tang(杨银堂) An interconnect width and spacing optimization model considering scattering effect 2010 Chin. Phys. B 19 097803

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