Statistical Elmore delay of RC interconnect tree

doi:10.1088/1674-1056/19/11/110202

Abstract As feature size keeps scaling down, process variations can dramatically reduce the accuracy in the estimation of interconnect performance. This paper proposes a statistical Elmore delay model for RC interconnect tree in the presence of process variations. The suggested method translates the process variations into parasitic parameter extraction and statistical Elmore delay evaluation. Analytical expressions of mean and standard deviation of interconnect delay can be obtained in a given fluctuation range of interconnect geometric parameters. Experimental results demonstrate that the approach matches well with Monte Carlo simulations. The errors of proposed mean and standard deviation are less than 1% and 7%, respectively. Simulations prove that our model is efficient and accurate.

Keywords: statistical delay parasitic extraction RC interconnect process variations

Received: 09 December 2009
Revised: 27 April 2010
Accepted manuscript online:

PACS:	02.40.-k	(Geometry, differential geometry, and topology)
	02.50.Ng	(Distribution theory and Monte Carlo studies)
	05.40.-a	(Fluctuation phenomena, random processes, noise, and Brownian motion)
	84.30.Bv	(Circuit theory)

Fund: Project supported by the National Natural Science Foundation of China (Grant No. 60606006), the National Science Fund for Distinguished Young Scholars of China (Grant No. 60725415), and the Basic Science Research Fund in Xidian University, China.

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Dong Gang(董刚), Yang Yang(杨杨), Chai Chang-Chun(柴常春), and Yang Yin-Tang(杨银堂) Statistical Elmore delay of RC interconnect tree 2010 Chin. Phys. B 19 110202

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[1]	A statistical RCL interconnect delay model taking account of process variations Zhu Zhang-Ming(朱樟明), Wan Da-Jing(万达经), Yang Yin-Tang(杨银堂), and En Yun-Fei(恩云飞). Chin. Phys. B, 2011, 20(1): 018401.

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Statistical Elmore delay of RC interconnect tree

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