中国物理B ›› 2011, Vol. 20 ›› Issue (2): 28501-028501.doi: 10.1088/1674-1056/20/2/028501

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Ultra-low on-resistance high voltage (>600 V) SOI MOSFET with a reduced cell pitch

Florin Udrea1, 罗小蓉2, 姚国亮2, 陈曦2, 王琦2, 葛瑞2   

  1. (1)Department of Engineering, University of Cambridge, Cambridge, CB3 0FA, UK; (2)State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China
  • 收稿日期:2010-09-19 修回日期:2010-10-12 出版日期:2011-02-15 发布日期:2011-02-15
  • 基金资助:
    Projects supported by the National Natural Science Foundation of China (Grant Nos. 60806025 and 60976060), the Science Fund of the National Laboratory of Analog Integrated Circuit (Grant No. 9140C0903070904), and the Innovation Foundation of the State Key Laboratory of Electronic Thin Films and Integrated Devices (Grant No. CXJJ201004).

Ultra-low on-resistance high voltage (>600 V) SOI MOSFET with a reduced cell pitch

Luo Xiao-Rong(罗小蓉)a)†,Yao Guo-Liang(姚国亮)a),Chen Xi(陈曦)a), Wang Qi(王琦)a),Ge Rui(葛瑞)a),and Florin Udreab)   

  1. a State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China; b Department of Engineering, University of Cambridge, Cambridge, CB3 0FA, UK
  • Received:2010-09-19 Revised:2010-10-12 Online:2011-02-15 Published:2011-02-15
  • Supported by:
    Projects supported by the National Natural Science Foundation of China (Grant Nos. 60806025 and 60976060), the Science Fund of the National Laboratory of Analog Integrated Circuit (Grant No. 9140C0903070904), and the Innovation Foundation of the State Key Laboratory of Electronic Thin Films and Integrated Devices (Grant No. CXJJ201004).

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摘要： A low specific on-resistance (RS,on) silicon-on-insulator (SOI) trench MOSFET (metal--oxide--semiconductor--field--effect--transistor) with a reduced cell pitch is proposed. The lateral MOSFET features multiple trenches: two oxide trenches in the drift region and a trench gate extended to the buried oxide (BOX) (SOI MT MOSFET). Firstly, the oxide trenches increase the average electric field strength along the x direction due to lower permittivity of oxide compared with that of Si; secondly, the oxide trenches cause multiple-directional depletion, which improves the electric field distribution and enhances the reduced surface field (RESURF) effect in the SOI layer. Both of them result in a high breakdown voltage (BV). Thirdly, the oxide trenches cause the drift region to be folded in the vertical direction, leading to a shortened cell pitch and a reduced RS,on. Fourthly, the trench gate extended to the BOX further reduces RS,on, owing to the electron accumulation layer. The BV of the MT MOSFET increases from 309 V for a conventional SOI lateral double diffused metal--oxide semiconductor (LDMOS) to 632 V at the same half cell pitch of 21.5 μ m, and RS,on decreases from 419 mΩ·cm2 to 36.6 mΩ·cm2. The proposed structure can also help to dramatically reduce the cell pitch at the same breakdown voltage.

关键词: silicon-on-insulator, electric field, breakdown voltage, trench gate, trench

Abstract: A low specific on-resistance (RS,on) silicon-on-insulator (SOI) trench MOSFET (metal–oxide–semiconductor–field–effect–transistor) with a reduced cell pitch is proposed. The lateral MOSFET features multiple trenches: two oxide trenches in the drift region and a trench gate extended to the buried oxide (BOX) (SOI MT MOSFET). Firstly, the oxide trenches increase the average electric field strength along the x direction due to lower permittivity of oxide compared with that of Si; secondly, the oxide trenches cause multiple-directional depletion, which improves the electric field distribution and enhances the reduced surface field (RESURF) effect in the SOI layer. Both of them result in a high breakdown voltage (BV). Thirdly, the oxide trenches cause the drift region to be folded in the vertical direction, leading to a shortened cell pitch and a reduced RS,on. Fourthly, the trench gate extended to the BOX further reduces RS,on, owing to the electron accumulation layer. The BV of the MT MOSFET increases from 309 V for a conventional SOI lateral double diffused metal–oxide semiconductor (LDMOS) to 632 V at the same half cell pitch of 21.5 μm, and RS,on decreases from 419 mΩ·cm2 to 36.6 mΩ·cm2. The proposed structure can also help to dramatically reduce the cell pitch at the same breakdown voltage.

Key words: silicon-on-insulator, electric field, breakdown voltage, trench gate, trench

中图分类号:  (Semiconductor-device characterization, design, and modeling)

  • 85.30.De
85.30.Tv (Field effect devices)