中国物理B ›› 2021, Vol. 30 ›› Issue (7): 77305-077305.doi: 10.1088/1674-1056/abe117

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Degradation of gate-recessed MOS-HEMTs and conventional HEMTs under DC electrical stress

Yi-Dong Yuan(原义栋)1,2, Dong-Yan Zhao(赵东艳)2, Yan-Rong Cao(曹艳荣)3,4,†, Yu-Bo Wang(王于波)2, Jin Shao(邵瑾)1, Yan-Ning Chen(陈燕宁)2, Wen-Long He(何文龙)3,4,†, Jian Du(杜剑)2, Min Wang(王敏)2,3, Ye-Ling Peng(彭业凌)2, Hong-Tao Zhang(张宏涛)3,4, Zhen Fu(付振)2, Chen Ren(任晨)2,3, Fang Liu(刘芳)2, Long-Tao Zhang(张龙涛)2,3, Yang Zhao(赵扬)2, Ling Lv(吕玲)4, Yi-Qiang Zhao(赵毅强)1, Xue-Feng Zheng(郑雪峰)4, Zhi-Mei Zhou(周芝梅)5, Yong Wan(万勇)5, and Xiao-Hua Ma(马晓华)4   

  1. 1 School of Microelectronics, Tianjin University, Tianjin 300072, China;
    2 Beijing Engineering Research Center of High-reliability IC with Power Industrial Grade, Beijing Smart-Chip Microelectronics Technology Co., Ltd, Beijing 100192, China;
    3 School of Electro-Mechanical Engineering, Xidian University, Xi'an 710071, China;
    4 Key Laboratory of Wide Band-Gap Semiconductor Materials and Devices, Xidian University, Xi'an 710071, China;
    5 Smart Shine Microelectronics Technology Co., Ltd, Qingdao 100081, China
  • 收稿日期:2020-11-13 修回日期:2020-12-25 接受日期:2021-01-29 出版日期:2021-06-22 发布日期:2021-06-30
  • 通讯作者: Yan-Rong Cao, Wen-Long He E-mail:yrcao@mail.xidian.edu.cn;he.wenlong1991@163.com
  • 基金资助:
    Project supported by the Laboratory Open Fund of Beijing Smart-chip Microelectronics Technology Co., Ltd and the National Natural Science Foundation of China (Grant No. 11690042), the Science Challenge Project, China (Grant Nos. TZ2018004 and 12035019), and the National Major Scientific Research Instrument Projects, China (Grant No. 61727804).

Degradation of gate-recessed MOS-HEMTs and conventional HEMTs under DC electrical stress

Yi-Dong Yuan(原义栋)1,2, Dong-Yan Zhao(赵东艳)2, Yan-Rong Cao(曹艳荣)3,4,†, Yu-Bo Wang(王于波)2, Jin Shao(邵瑾)1, Yan-Ning Chen(陈燕宁)2, Wen-Long He(何文龙)3,4,†, Jian Du(杜剑)2, Min Wang(王敏)2,3, Ye-Ling Peng(彭业凌)2, Hong-Tao Zhang(张宏涛)3,4, Zhen Fu(付振)2, Chen Ren(任晨)2,3, Fang Liu(刘芳)2, Long-Tao Zhang(张龙涛)2,3, Yang Zhao(赵扬)2, Ling Lv(吕玲)4, Yi-Qiang Zhao(赵毅强)1, Xue-Feng Zheng(郑雪峰)4, Zhi-Mei Zhou(周芝梅)5, Yong Wan(万勇)5, and Xiao-Hua Ma(马晓华)4   

  1. 1 School of Microelectronics, Tianjin University, Tianjin 300072, China;
    2 Beijing Engineering Research Center of High-reliability IC with Power Industrial Grade, Beijing Smart-Chip Microelectronics Technology Co., Ltd, Beijing 100192, China;
    3 School of Electro-Mechanical Engineering, Xidian University, Xi'an 710071, China;
    4 Key Laboratory of Wide Band-Gap Semiconductor Materials and Devices, Xidian University, Xi'an 710071, China;
    5 Smart Shine Microelectronics Technology Co., Ltd, Qingdao 100081, China
  • Received:2020-11-13 Revised:2020-12-25 Accepted:2021-01-29 Online:2021-06-22 Published:2021-06-30
  • Contact: Yan-Rong Cao, Wen-Long He E-mail:yrcao@mail.xidian.edu.cn;he.wenlong1991@163.com
  • Supported by:
    Project supported by the Laboratory Open Fund of Beijing Smart-chip Microelectronics Technology Co., Ltd and the National Natural Science Foundation of China (Grant No. 11690042), the Science Challenge Project, China (Grant Nos. TZ2018004 and 12035019), and the National Major Scientific Research Instrument Projects, China (Grant No. 61727804).

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摘要： The performance degradation of gate-recessed metal-oxide-semiconductor high electron mobility transistor (MOS-HEMT) is compared with that of conventional high electron mobility transistor (HEMT) under direct current (DC) stress, and the degradation mechanism is studied. Under the channel hot electron injection stress, the degradation of gate-recessed MOS-HEMT is more serious than that of conventional HEMT devices due to the combined effect of traps in the barrier layer, and that under the gate dielectric of the device. The threshold voltage of conventional HEMT shows a reduction under the gate electron injection stress, which is caused by the barrier layer traps trapping the injected electrons and releasing them into the channel. However, because of defects under gate dielectrics which can trap the electrons injected from gate and deplete part of the channel, the threshold voltage of gate-recessed MOS-HEMT first increases and then decreases as the conventional HEMT. The saturation phenomenon of threshold voltage degradation under high field stress verifies the existence of threshold voltage reduction effect caused by gate electron injection.

关键词: gate-recessed MOS-HEMTs, channel electron injection, gate electron injection, barrier layer traps

Abstract: The performance degradation of gate-recessed metal-oxide-semiconductor high electron mobility transistor (MOS-HEMT) is compared with that of conventional high electron mobility transistor (HEMT) under direct current (DC) stress, and the degradation mechanism is studied. Under the channel hot electron injection stress, the degradation of gate-recessed MOS-HEMT is more serious than that of conventional HEMT devices due to the combined effect of traps in the barrier layer, and that under the gate dielectric of the device. The threshold voltage of conventional HEMT shows a reduction under the gate electron injection stress, which is caused by the barrier layer traps trapping the injected electrons and releasing them into the channel. However, because of defects under gate dielectrics which can trap the electrons injected from gate and deplete part of the channel, the threshold voltage of gate-recessed MOS-HEMT first increases and then decreases as the conventional HEMT. The saturation phenomenon of threshold voltage degradation under high field stress verifies the existence of threshold voltage reduction effect caused by gate electron injection.

Key words: gate-recessed MOS-HEMTs, channel electron injection, gate electron injection, barrier layer traps

中图分类号:  (III-V semiconductors)

  • 73.61.Ey
73.20.-r (Electron states at surfaces and interfaces) 73.40.Kp (III-V semiconductor-to-semiconductor contacts, p-n junctions, and heterojunctions) 73.40.Qv (Metal-insulator-semiconductor structures (including semiconductor-to-insulator))