中国物理B ›› 2009, Vol. 18 ›› Issue (12): 5479-5484.doi: 10.1088/1674-1056/18/12/058

• • 上一篇    下一篇

Study on the degradation of NMOSFETs with ultra-thin gate oxide under channel hot electron stress at high temperature

胡仕刚, 郝跃, 马晓华, 曹艳荣, 陈炽, 吴笑峰   

  1. School of Microelectronics, Xidian University, Xi'an 710071, China ; Key Laboratory of Wide Band-Gap Semiconductor Materials and Devices, Xi'an 710071, China
  • 收稿日期:2008-08-22 修回日期:2009-04-03 出版日期:2009-12-20 发布日期:2009-12-20
  • 基金资助:
    Project supported by the National Natural Science Foundation of China (Grant Nos 60736033 and 60506020).

Study on the degradation of NMOSFETs with ultra-thin gate oxide under channel hot electron stress at high temperature

Hu Shi-Gang(胡仕刚)†,Hao Yue(郝跃), Ma Xiao-Hua(马晓华), Cao Yan-Rong(曹艳荣), Chen Chi(陈炽), and Wu Xiao-Feng(吴笑峰)   

  1. School of Microelectronics, Xidian University, Xi'an 710071, China ; Key Laboratory of Wide Band-Gap Semiconductor Materials and Devices, Xi'an 710071, China
  • Received:2008-08-22 Revised:2009-04-03 Online:2009-12-20 Published:2009-12-20
  • Supported by:
    Project supported by the National Natural Science Foundation of China (Grant Nos 60736033 and 60506020).

PDF (PC)

959

赞

摘要： This paper studies the degradation of device parameters and that of stress induced leakage current (SILC) of thin tunnel gate oxide under channel hot electron (CHE) stress at high temperature by using n-channel metal oxide semiconductor field effect transistors (NMOSFETs) with 1.4-nm gate oxides. The degradation of device parameters under CHE stress exhibits saturating time dependence at high temperature. The emphasis of this paper is on SILC of an ultra-thin-gate-oxide under CHE stress at high temperature. Based on the experimental results, it is found that there is a linear correlation between SILC degradation and Vh degradation in NMOSFETs during CHE stress. A model of the combined effect of oxide trapped negative charges and interface traps is developed to explain the origin of SILC during CHE stress.

Abstract: This paper studies the degradation of device parameters and that of stress induced leakage current (SILC) of thin tunnel gate oxide under channel hot electron (CHE) stress at high temperature by using n-channel metal oxide semiconductor field effect transistors (NMOSFETs) with 1.4-nm gate oxides. The degradation of device parameters under CHE stress exhibits saturating time dependence at high temperature. The emphasis of this paper is on SILC of an ultra-thin-gate-oxide under CHE stress at high temperature. Based on the experimental results, it is found that there is a linear correlation between SILC degradation and Vh degradation in NMOSFETs during CHE stress. A model of the combined effect of oxide trapped negative charges and interface traps is developed to explain the origin of SILC during CHE stress.

Key words: threshold voltage, interface traps, stress induced leakage current

中图分类号:  (Field effect devices)

  • 85.30.Tv
85.30.De (Semiconductor-device characterization, design, and modeling)